# Applied Materials

> Source: https://aiwiki.ai/wiki/applied_materials
> Updated: 2026-07-31
> Categories: AI Companies, AI Hardware, AI for Science
> License: CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/)
> From AI Wiki (https://aiwiki.ai), the free encyclopedia of artificial intelligence. Reuse freely with attribution to "AI Wiki (aiwiki.ai)".

**Applied Materials, Inc.** (Nasdaq: AMAT) is an American maker of semiconductor manufacturing equipment, incorporated in 1967 as a Delaware corporation and headquartered at 3050 Bowers Avenue in Santa Clara, California. Its systems carry out most of the physical steps that turn a blank silicon wafer into a finished chip: depositing thin films, etching them away, polishing surfaces flat, implanting dopants, and measuring the result. Because those steps are how leading-edge logic and [high bandwidth memory](/wiki/high_bandwidth_memory) are actually built, Applied sits one layer beneath the companies that ship [AI accelerators](/wiki/ai_accelerator), and it reported record revenue of $28.37 billion in fiscal 2025.[1][2]

| Field | Value |
| --- | --- |
| Founded | Incorporated 1967 (Delaware corporation)[1] |
| Headquarters | 3050 Bowers Avenue, Santa Clara, California[1] |
| Ticker | Nasdaq: AMAT[1] |
| President and CEO | Gary Dickerson (appointed president and CEO effective September 1, 2013)[3] |
| Fiscal year end | Last Sunday in October (fiscal 2025 ended October 26, 2025)[1] |
| Reportable segments | Semiconductor Systems; Applied Global Services[1] |
| Fiscal 2025 revenue | $28,368 million[2] |
| Fiscal 2025 R&D and engineering | $3,570 million[1] |
| Employees | Approximately 36,500 regular full-time, across 25 countries, as of October 26, 2025[1] |

## What the equipment does

Applied's Semiconductor Systems segment, which produced $20.80 billion of fiscal 2025 revenue, sells equipment for etch, rapid thermal processing, deposition, chemical mechanical planarization (CMP), metrology and inspection, wafer packaging, and ion implantation.[1][2] The second segment, Applied Global Services, sells spare parts, upgrades, services, 200-millimeter equipment, and factory automation software, and contributed $6.39 billion.[1][2] A residual display business generated $1.06 billion and is no longer reported as a separate segment.[2]

The company describes itself as a materials engineering company rather than a lithography company, and that distinction matters when comparing it to peers. Lithography prints the pattern; everything else builds the structure the pattern defines. Deposition grows the metal and dielectric layers, etch removes material selectively, CMP polishes each layer flat enough that the next one can be printed in focus, ion implantation places dopant atoms into silicon to set a transistor's electrical behavior, and metrology and inspection tools check whether any of it worked.

### Why this constrains AI compute

An AI accelerator is a very large logic die (or several dies) attached to stacks of DRAM. Both halves depend on process steps Applied sells into.

On the logic side, the leading foundries have moved to gate-all-around (GAA) transistors at 2 nm and below. Applied says building the 3D structures inside a GAA transistor takes more than 500 process steps.[4] Two of the systems it introduced on April 8, 2026 illustrate the type of work involved. The Producer Precision Selective Nitride PECVD system deposits silicon nitride selectively into shallow trench isolation structures so that later processing does not erode the insulating oxide, which the company says reduces parasitic capacitance and leakage between neighboring transistors.[4] The Endura Trillium ALD system deposits the metal gate stack that wraps around silicon nanosheets spaced roughly 10 nanometers apart, which Applied compares to about one ten-thousandth the width of a human hair; varying the metals in that stack is how chipmakers offer designers transistors tuned for speed versus transistors tuned for low power.[4] Applied says both systems are being adopted by leading logic manufacturers at 2 nm and below.[4]

On the memory side, Applied framed the problem in a June 25, 2026 announcement: AI compute is increasingly limited by memory bandwidth and capacity rather than arithmetic, a constraint the company calls the memory wall, and the response has been [HBM](/wiki/hbm4) and 3D stacking.[5] Its new systems there target the specific failure modes of stacking. The Opta Quad CMP platform is aimed at hybrid bonding, in which copper wiring and surrounding dielectric from two chips are fused directly and near-perfect surface flatness determines yield.[5] The Nokota VMax 2 electrochemical deposition system plates copper into through-silicon vias and microbumps.[5] The Producer Avila 2 PECVD system deposits stress-balanced dielectric films around through-silicon vias to keep HBM dies, thinned to roughly one twenty-fifth the thickness of a standard wafer, from warping as 12-layer and 16-layer stacks are assembled.[5] Applied also markets systems for backside power delivery, another leading-edge logic change, including the PROVision 10 eBeam metrology system announced in October 2025.[6]

The practical consequence is that a shortage or a yield problem at any of these steps propagates directly into accelerator supply. A single defect can require scrapping an entire HBM stack, which is why Applied has been extending wafer-fab-grade inspection into packaging lines.[5]

Packaging is also where Applied has been buying rather than building. On May 3, 2026 it agreed to acquire the NEXX business from ASMPT Limited, a supplier of large-area advanced packaging deposition equipment based in Billerica, Massachusetts. Applied said the deal broadens its panel-level portfolio as AI packages outgrow 300-millimeter silicon wafers and move to panel formats as large as 510 by 515 millimeters, and that the transaction was expected to close within several months and required no regulatory approvals.[24]

## Competitive position

Applied Materials is one of five companies that dominate wafer fabrication equipment, and they overlap less than casual coverage suggests. [ASML](/wiki/asml) is the sole supplier of extreme ultraviolet lithography and does not compete with Applied in deposition or etch; Applied does not sell lithography scanners, though it does sell digital lithography for panel-level advanced packaging.[7][8] Lam Research overlaps most directly with Applied in etch and deposition. KLA is concentrated in process control. Tokyo Electron spans coater/developer, etch, deposition, cleaning and test.

| Company | Main specialty | Most recent reported fiscal year revenue | Period |
| --- | --- | --- | --- |
| ASML | Lithography, including sole-source EUV[7] | 32.7 billion euros[7] | Calendar year 2025 |
| Applied Materials | Deposition, etch, CMP, ion implantation, metrology and inspection, packaging[1] | $28.37 billion[2] | Fiscal year ended Oct 26, 2025 |
| Lam Research | Deposition, etch[9] | $23.23 billion[9] | Fiscal year ended Jun 28, 2026 |
| Tokyo Electron | Coater/developer, etch, deposition, cleaning, test[10] | 2,443.5 billion yen[10] | Fiscal year ended Mar 31, 2026 |
| KLA | Process control, inspection and metrology[11] | $13.58 billion[11] | Fiscal year ended Jun 30, 2026 |

The market research firm TechInsights, in an analysis published July 17, 2026, put the 2025 IC manufacturing equipment market at $136.2 billion, up 13 percent, and ranked ASML first at $27.5 billion in equipment revenue, followed by Applied Materials, Lam Research, Tokyo Electron and KLA.[8] Applied is therefore not the largest equipment supplier by revenue; the narrower claim its own management makes is different. On the May 14, 2026 earnings release, chief financial officer Brice Hill described Applied as "the largest process equipment company in the fastest growing markets," a formulation that excludes lithography.[12]

## The NVIDIA collaboration

On July 26, 2026, the opening day of the 63rd Design Automation Conference at the Long Beach Convention Center in California,[14][25] [NVIDIA](/wiki/nvidia) published a technical blog post by Azi Riahi, Pawini Mahajan and Umesh Kelkar describing a joint effort with Applied Materials.[13] Kelkar leads Applied's Computational Products and Solutions team and its AI and digital twin strategy for the Semiconductor Products Group.[13] The two companies describe an end-to-end digital development model with three stages: atomic-scale materials discovery, chamber and recipe engineering, and factory optimization.[13] Every performance figure below is a vendor claim published by NVIDIA and attributed to work with Applied Materials.

### Ginestra and cuDSS

Ginestra is Applied's physics-based, defect-centric simulation platform, which links material properties and atomic defects to predicted device performance. NVIDIA cites high-k metal gate stacks in GAA transistors as a target application, noting that five distinct materials are packed into a space NVIDIA describes as barely one ten-thousandth the width of a human hair.[13] Applied integrated NVIDIA cuDSS, the CUDA-X direct sparse solver library, into Ginestra to accelerate the sparse linear algebra at the core of these simulations. NVIDIA reports up to a 10x speedup over CPU-only approaches without loss of accuracy, which it says lets engineers run thousands of virtual experiments across material combinations and reaction pathways.[13]

### Density functional theory and cuEST

Density functional theory (DFT) is the standard way to compute the electronic structure of a material from first principles. Instead of solving for the full many-electron wavefunction, which is intractable for realistic systems, DFT reformulates the problem in terms of electron density. It is accurate enough to predict properties such as band structure and defect energies, but the cost rises steeply with the number of atoms, so conventional CPU runs on industrially interesting systems take days or weeks. That cost is the reason DFT has historically been used to check a handful of candidate materials rather than to search a space of them.

NVIDIA cuEST (CUDA Electronic Structure Theory) is a CUDA-X library that accelerates the most demanding building blocks of Gaussian-basis DFT through modular APIs that plug into existing quantum chemistry workflows.[13] NVIDIA reports that on [NVIDIA B200](/wiki/nvidia_b200) systems, simulations that previously took five days on 64 CPU cores complete in about two hours on a single [GPU](/wiki/gpu), an approximately 55x speedup, and that reaction-search tasks that previously needed hundreds of CPU cores for more than a week now run in hours.[13]

A related result came earlier, on March 16, 2026 at NVIDIA's [GTC](/wiki/gtc) conference, when Synopsys announced that its QuantumATK atomistic simulation software had been integrated with cuEST. Synopsys said early results from Applied Materials showed a potential 30X speedup for complex quantum chemistry workloads compared with open-source models running on CPUs, and that Applied had previously achieved an 8X speedup using NVIDIA GPUs against multi-core CPUs on multi-nanometer amorphous systems of roughly 25,000 atoms.[15] Gary Dickerson said in that release that the three companies were working to "accelerate materials engineering innovations that can deliver tremendous improvements in energy-efficient performance of advanced semiconductor devices."[15]

### ACE+, PhysicsNeMo and chamber digital twins

Finding a promising material is not the same as manufacturing with it. Applied's ACE+ platform simulates the coupled physics inside a process chamber: fluid flow, heat transfer, plasma dynamics, surface reactions and electromagnetic effects, all of which interact with chamber geometry and recipe parameters.[13] NVIDIA PhysicsNeMo, a framework for physics-informed [machine learning](/wiki/machine_learning), is then used to turn those simulation results into real-time surrogate models. NVIDIA reports that ACE+ topography simulations run up to 35x faster with GPU acceleration, turning multi-day batch runs into same-day results and letting engineers change a parameter and see the effect immediately.[13]

A [digital twin](/wiki/digital_twin) of a process chamber, in this context, is a model that predicts how a wafer surface evolves under a given recipe: where material lands, where it is removed, and what the resulting profile looks like at feature scale. It replaces some of the physical test wafers that would otherwise be needed to converge on a recipe.

### Omniverse fab twins

At the factory level, Applied uses [NVIDIA Omniverse](/wiki/nvidia_omniverse) libraries to build physically accurate digital twins of entire fabs. NVIDIA says these are used to optimize layouts, simulate material flow, find bottlenecks and validate operational strategies before changes reach the production floor.[13] A fab twin of this kind models logistics and equipment interaction, in other words how wafers move between hundreds of tools, rather than the physics happening inside any one chamber.

## AI inside Applied's own products

Applied has been putting [deep learning](/wiki/deep_learning) into its process control tools for several years, independently of the NVIDIA work.

The SEMVision H20 eBeam defect review system, announced February 19, 2025, pairs a second-generation cold field emission electron source with deep learning image models that separate real defects from nuisance signals and sort them into categories such as voids, residues, scratches and particles.[16] Applied says the deep learning network is continuously trained on data from an individual customer's fab, and that the system delivers results as much as 3X faster than the most advanced prior techniques, with the CFE source increasing image resolution by up to 50 percent and imaging speed by up to 10X compared with conventional thermal field emission.[16] The stated motivation is a data problem: at the most advanced nodes, optical inspection can deliver as much as a 100X increase in the number of defect candidates handed to eBeam review, so classification has to be automated.[16]

In June 2026 Applied extended the same approach into packaging with SEMVision G7AP, which performs high-resolution defect review and automated classification across silicon, organic and glass substrates, and VeritySEM 7AP for critical dimension metrology on thick, heterogeneous and warped substrates.[5] Applied says SEMVision G7AP is already in production at leading memory and logic manufacturers.[5]

## The EPIC Center

The Equipment and Process Innovation and Commercialization (EPIC) Center is a research facility on Applied's existing site in Sunnyvale, California. Reuters reported in May 2023 that the company would invest up to $4 billion over about seven years, create up to 2,000 engineering jobs, and host roughly $25 billion of research work in the facility's first decade.[17] By February 2026 Applied was describing it as a $5 billion project and said it was on track to become operational during 2026.[18]

The stated purpose is to compress the serial, compartmentalized chip development cycle by running process development in parallel with partners in shared cleanroom space.[18] [Samsung](/wiki/samsung) was announced as the first founding member in February 2026.[18] Applied subsequently announced EPIC engagements with [TSMC](/wiki/tsmc), [SK hynix](/wiki/sk_hynix), [Micron Technology](/wiki/micron_technology), test equipment maker Advantest, [Broadcom](/wiki/broadcom), wafer cleaning specialist SCREEN, and Arizona State University, Rensselaer Polytechnic Institute and Stanford University as inaugural research partners.[12]

## Financial performance

| Measure | FY2025 (ended Oct 26, 2025) | Q2 FY2026 (ended Apr 26, 2026) |
| --- | --- | --- |
| Revenue | $28,368 million[2] | $7,910 million, up 11 percent year over year[12] |
| GAAP gross margin | 48.7 percent[2] | 49.9 percent[12] |
| GAAP operating margin | 29.2 percent[2] | 31.9 percent[12] |
| GAAP diluted EPS | $8.66[2] | $3.51[12] |
| Non-GAAP diluted EPS | $9.42[2] | $2.86[12] |
| Semiconductor Systems revenue | $20,798 million[2] | $5,965 million[12] |
| Applied Global Services revenue | $6,385 million[2] | $1,665 million[12] |

Fiscal 2025 was Applied's sixth consecutive year of revenue growth, which Gary Dickerson attributed to "AI adoption" driving investment in advanced semiconductors and wafer fab equipment.[2] For the third quarter of fiscal 2026 the company guided to revenue of $8.95 billion plus or minus $500 million, and Dickerson said Applied then expected its semiconductor equipment business to grow more than 30 percent in calendar 2026.[12] Third quarter fiscal 2026 results were scheduled for August 13, 2026, after this article's cutoff.[19]

## China, export controls and policy

China is Applied's largest single market by shipment destination, and its share has been falling. Net revenue from China was $8,529 million in fiscal 2025, 30 percent of the total, down 16 percent from $10,117 million and 37 percent in fiscal 2024.[1] Taiwan and Korea both grew over the same period, to $6,857 million and $5,608 million respectively.[1]

On October 3, 2025, Reuters reported that Applied expected a $600 million revenue hit in fiscal 2026, and a $110 million hit in the fourth quarter of fiscal 2025, from the Commerce Department's expansion of its [export controls](/wiki/export_controls) to cover companies at least 50 percent owned by parties on the [Entity List](/wiki/entity_list), a change commonly called the affiliates rule.[20] The company's fiscal 2025 Form 10-K also warns that domestic Chinese equipment makers may gain share as a result of local incentives and of US restrictions on what Applied can ship.[1]

Applied has disclosed that since 2022 it has received multiple subpoenas from the US Department of Justice, the Commerce Department's Bureau of Industry and Security, and the Securities and Exchange Commission seeking information about certain China customer shipments and export controls compliance, and separately from the Justice Department about certain federal award applications and information submitted to the federal government. The company says it is cooperating fully and states that it cannot predict the outcome or reasonably estimate a range of loss.[1]

On the [CHIPS Act](/wiki/chips_act) side, the record is mixed. Bloomberg reported on August 1, 2024 that the Commerce Department had rejected Applied's bid for CHIPS funding toward the $4 billion Sunnyvale EPIC Center.[21] Applied did receive a separate, smaller award: on January 16, 2025 the Commerce Department finalized $100 million in direct funding under the CHIPS National Advanced Packaging Manufacturing Program for silicon-core substrate technology for advanced packaging and 3D heterogeneous integration, with Applied expected to contribute $54 million in matching funds.[22]

## Limitations and criticism

Applied's business is cyclical and concentrated. Its customers are a small number of logic and memory manufacturers whose capital spending moves in waves, and its revenue is heavily weighted toward a handful of geographies; in fiscal 2025, China, Taiwan and Korea together accounted for 74 percent of net revenue.[1] The current wave is driven by [AI infrastructure](/wiki/ai_infrastructure) spending, which means an AI capital expenditure slowdown would reach equipment orders with a lag.

Export control exposure is a named risk in the company's own filings and has already produced quantified revenue reductions and open government inquiries.[1][20] Applied also cut staff: on October 23, 2025 it approved a workforce reduction plan affecting approximately 4 percent of its global workforce, expecting charges of roughly $160 million to $180 million, mostly cash severance, with most of the charge recognized in the fourth quarter of fiscal 2025 and the plan completed in the first quarter of fiscal 2026.[23] The fiscal 2025 income statement records $181 million of restructuring charges.[1]

Finally, the performance figures in the NVIDIA collaboration are vendor-published and not independently benchmarked. NVIDIA states the 10x, 55x and 35x results as outcomes of joint work with Applied Materials; no third-party reproduction has been published, and the CPU baselines (64 cores in the cuEST case) are the ones NVIDIA chose.[13]

## See also

- [NVIDIA](/wiki/nvidia)
- [ASML](/wiki/asml)
- [TSMC](/wiki/tsmc)
- [High bandwidth memory](/wiki/high_bandwidth_memory)
- [NVIDIA Omniverse](/wiki/nvidia_omniverse)
- [Digital twin](/wiki/digital_twin)
- [CHIPS Act](/wiki/chips_act)
- [Export controls](/wiki/export_controls)

## References

1. Applied Materials, Inc., "Form 10-K for the fiscal year ended October 26, 2025", filed with the US Securities and Exchange Commission, December 12, 2025. https://www.sec.gov/Archives/edgar/data/6951/000162828025056742/amat-20251026.htm
2. Applied Materials, "Applied Materials Announces Fourth Quarter and Fiscal Year 2025 Results", GlobeNewswire, November 13, 2025. https://www.globenewswire.com/news-release/2025/11/13/3187810/0/en/applied-materials-announces-fourth-quarter-and-fiscal-year-2025-results.html
3. Applied Materials, "Applied Materials Names Gary E. Dickerson as Chief Executive Officer", Applied Materials investor relations. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-names-gary-e-dickerson-chief-executive-officer
4. Applied Materials, "Applied Materials Introduces Deposition Systems for Angstrom-Era Logic Chips", April 8, 2026. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-introduces-deposition-systems-angstrom-era
5. Applied Materials, "Applied Materials Introduces New Systems to Accelerate DRAM and Advanced Packaging for AI Chips", June 25, 2026. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-introduces-new-systems-accelerate-dram-and
6. Applied Materials, "Applied Materials Unveils Next-Gen Chipmaking Products to Supercharge AI Performance", October 7, 2025. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-unveils-next-gen-chipmaking-products
7. ASML, "ASML reports 32.7 billion euros total net sales and 9.6 billion euros net income in 2025", GlobeNewswire, January 28, 2026. https://www.globenewswire.com/news-release/2026/01/28/3227191/0/en/ASML-reports-32-7-billion-total-net-sales-and-9-6-billion-net-income-in-2025.html
8. TechInsights, "Top IC Manufacturing Equipment Suppliers in 2025: Market Share, Rankings, and Growth Drivers", July 17, 2026. https://www.techinsights.com/blog/top-ic-manufacturing-equipment-suppliers-2025
9. Lam Research, "Lam Research Corporation Reports Financial Results for the Quarter Ended June 28, 2026", PR Newswire, July 29, 2026. https://www.prnewswire.com/news-releases/lam-research-corporation-reports-financial-results-for-the-quarter-ended-june-28-2026-302838154.html
10. Tokyo Electron Limited, "Summary of Consolidated Financial Results for the Year Ended March 31, 2026 (Japanese GAAP)", April 30, 2026. https://www.tel.com/ir/library/report/pjuomj00000000tf-att/fy26q4tanshin-e.pdf
11. KLA Corporation, "KLA Corporation Reports Fiscal 2026 Fourth Quarter and Full Year Results", July 28, 2026. https://ir.kla.com/news-events/press-releases/detail/518/kla-corporation-reports-fiscal-2026-fourth-quarter-and-full
12. Applied Materials, "Applied Materials Announces Second Quarter 2026 Results", May 14, 2026. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-announces-second-quarter-2026-results
13. Azi Riahi, Pawini Mahajan and Umesh Kelkar, "Advancing Semiconductor Innovation Across Materials Engineering and Manufacturing", NVIDIA Technical Blog, July 26, 2026. https://developer.nvidia.com/blog/advancing-semiconductor-innovation-across-materials-engineering-and-manufacturing/
14. NVIDIA, "DAC 2026, July 26 to 29, Long Beach, California" event page. https://www.nvidia.com/en-us/events/dac/
15. Synopsys, "Synopsys Showcases NVIDIA Partnership Impact and Ecosystem Innovation at GTC 2026", March 16, 2026. https://news.synopsys.com/2026-03-16-Synopsys-Showcases-NVIDIA-Partnership-Impact-and-Ecosystem-Innovation-at-GTC-2026
16. Applied Materials, "Applied Materials Accelerates Chip Defect Review with Next-Gen eBeam System", February 19, 2025. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-accelerates-chip-defect-review-next-gen-ebeam
17. Reuters, "Applied Materials to invest $4 billion in Silicon Valley chip research center", May 23, 2023. https://finance.yahoo.com/news/applied-materials-invest-4-billion-090155632.html
18. Applied Materials, "Applied Materials Announces Samsung Electronics Will Join the New, Multibillion-Dollar EPIC Center in Silicon Valley", February 11, 2026. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-announces-samsung-electronics-will-join-new
19. Applied Materials, investor relations news releases index (listing "Applied Materials to Report Fiscal Third Quarter 2026 Results on Aug. 13, 2026", July 23, 2026). https://ir.appliedmaterials.com/news-releases
20. Reuters, "Applied Materials flags $600 million revenue hit in 2026 on broader chip export curbs", October 3, 2025. https://finance.yahoo.com/news/applied-materials-flags-600-million-224151556.html
21. Bloomberg, "Applied Materials denied US CHIPS grant for $4 bln R&D project", August 1, 2024. https://finance.yahoo.com/news/applied-materials-denied-us-chips-212514679.html
22. NIST CHIPS for America, "Applied Materials" award summary (Santa Clara, California; $100 million final award announced January 16, 2025). https://www.nist.gov/chips/applied-materials-santa-clara
23. CNBC, "Applied Materials lays off 4% of workforce", October 23, 2025 (reporting the company's Form 8-K of the same date). https://www.cnbc.com/2025/10/23/applied-materials-lays-off-4percent-of-workforce.html
24. Applied Materials, "Applied Materials Broadens Advanced Packaging Portfolio with Acquisition of NEXX", May 3, 2026. https://ir.appliedmaterials.com/news-releases/news-release-details/applied-materials-broadens-advanced-packaging-portfolio
25. DATE Conference, company profile for "63rd THE CHIPS TO SYSTEM CONFERENCE (DAC)", listing DAC 2026 as July 26 to 29, 2026 in Long Beach, California. https://www.date-conference.com/company-profile/dac