# Empyrean Technology

> Source: https://aiwiki.ai/wiki/empyrean_technology
> Updated: 2026-09-15
> Fact-checked: 2026-09-15
> Categories: AI Companies, AI Hardware, AI Policy & Regulation, Chinese AI
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Empyrean Technology (Chinese: 北京华大九天科技股份有限公司, Beijing Huada Jiutian Technology Co., Ltd.; trading as Empyrean) is a Chinese electronic design automation (EDA) software company headquartered in Beijing and listed on the ChiNext board of the Shenzhen Stock Exchange under the ticker 301269. It is the largest domestic supplier of chip design software in China and the country's main alternative to Synopsys, Cadence Design Systems and [Siemens](https://aiwiki.ai/wiki/siemens) EDA, the three Western vendors that dominate the global market [1][2]. Control sits with China Electronics Corporation (CEC), a central state-owned electronics group that took full board control in December 2024, a week after the United States added Empyrean and its subsidiaries to the Entity List [2][3].

EDA is the software engineers use to design and test chips before they are manufactured, and building a domestic alternative has become a priority for Beijing precisely because the global market is dominated by Western vendors [1]. Empyrean's 2025 revenue was RMB 1.325 billion, up 8.40 percent year on year, with net profit attributable to shareholders of RMB 60.98 million, down 44.30 percent [4].

In September 2026 chairman Liu Weiping used a Shenzhen trade show to put [agentic AI](https://aiwiki.ai/wiki/agentic_ai) at the centre of the company's pitch, saying an AI agent had cut a four-week circuit layout task to one week, and predicting that EDA pricing would move from the traditional software licence towards token consumption [1].

## Origins

The company was incorporated in 2009 by China Huada Integrated Circuit Design Group together with Liu Weiping and others, and descends from a much older state effort [5]. Work on Panda ICCAD, China's first EDA system with domestic intellectual property, began in 1988 at the Beijing Integrated Circuit Design Centre, later renamed the China Huada Integrated Circuit Design Centre, after trade restrictions blocked the import of a computer-aided design system for the Wuxi microelectronics project. Panda was released in 1990. Liu, then a microelectronics master's student at Fudan University, joined the Panda team and afterwards worked at the Beijing design centre; several other members of Empyrean's founding team had worked on the same system [5].

## Listing and ownership

Empyrean listed on the ChiNext board of the Shenzhen Stock Exchange on 29 July 2022 at an issue price of RMB 32.69 per share. The stock opened at RMB 69.05 and closed its first day up 129.43 percent, giving a market capitalisation of about RMB 40.7 billion. The offering raised more than RMB 3.5 billion against a planned RMB 2.551 billion, with proceeds earmarked for projects including digital design synthesis and verification tooling. Thirteen strategic investors took part, among them Will Semiconductor and an [SMIC](https://aiwiki.ai/wiki/smic) subsidiary [5].

The register is dominated by state capital. At the end of 2025 the largest holders were 中国电子有限公司, a CEC entity, with 21.12 percent (115,200,804 shares); 中电金投控股有限公司 with 12.78 percent (69,700,000 shares); and the China Integrated Circuit Industry Investment Fund with 8.34 percent (45,478,067 shares). A Shanghai Jianyuan private equity fund held 6.55 percent, Guoxin Investment 3.99 percent and Shenzhen Capital Group 2.57 percent. The filing notes that the CEC-linked holders are subsidiaries of China Electronics Corporation acting in concert [4].

## Products

Empyrean describes its business as developing and selling EDA tool software for integrated circuit design, manufacturing and packaging, plus related services [4].

| Product family | What it covers |
| --- | --- |
| Full-custom design platform | Full-flow EDA systems for analog, memory, RF and flat-panel display circuit design |
| Digital circuit design | Simulation, static timing, power integrity and physical verification signoff tools; the company says its range now covers about 80 percent of the main tools a digital flow needs |
| Wafer manufacturing | Design support, tape-out and mask generation, yield analysis, and design-technology co-optimisation (DTCO) |
| Advanced packaging | Large-scale layout design and physical verification for chiplet-based packages |
| 3DIC design | Co-design through verification for 2.5D and 3D heterogeneous integration |
| Technical services | Foundation IP development, test chip design, wafer and IP test, SPICE model extraction, PDK development |

The analog and flat-panel display lines are the mature ones. The company reports that its flat-panel flow is used by more than 90 percent of domestic panel makers and by the four largest terminal manufacturers, and that the PDK kits it develops with Chinese foundries cover more than 70 percent of domestic foundry process nodes [4]. Digital design is the acknowledged gap: the 2022 prospectus stated plainly that some tools supported 5 nm processes but not the whole flow [5]. Four digital products were added in 2025, namely the Hima Sim simulation and verification tool, Hima Time static timing analysis signoff, Hima EMIR power integrity signoff and Argus SoC physical verification signoff [4].

Foundry certifications reported for 2025 cover the ALPS circuit simulator at 8 nm, 5 nm and 4 nm, the Patron transistor-level power integrity tool at 14 nm, and Argus DRC/LVS physical verification at 28 nm. Eight tools, including Aether, ALPS, Argus, RCExplorer, Polas, Patron, Qualib and ICExplorer-XTime, hold ISO 26262 TCL3 and IEC 61508 T2 certification, which allows their use on designs at the highest automotive safety integrity level, ASIL D [4].

## Financial performance

| RMB | 2023 | 2024 | 2025 |
| --- | --- | --- | --- |
| Revenue | 1.010 bn | 1.222 bn | 1.325 bn |
| Net profit attributable to shareholders | 200.72 m | 109.48 m | 60.98 m |
| Net profit excluding non-recurring items | 64.01 m | -57.07 m | -9.80 m |
| Operating cash flow | 248.52 m | -51.78 m | 560.65 m |
| Total assets | 5.536 bn | 5.629 bn | 6.328 bn |

Source: 2025 annual report summary [4].

Revenue is heavily back-loaded. The fourth quarter of 2025 produced RMB 520.2 million of the RMB 1,325.0 million annual total, while each of the first three quarters ran between RMB 234 million and RMB 303 million [4]. Stripping out non-recurring items, the core business has been loss-making since 2024, though the 2025 loss narrowed. The company proposed a cash dividend of RMB 1.50 per 10 shares on a base of 545,437,608 shares, about RMB 81.8 million in total [4]. Market capitalisation was about RMB 62.3 billion at the 9 July 2025 close, when the shares traded at RMB 114.68 [6].

## Market position

Share estimates put Empyrean first among domestic vendors and far behind the incumbents. A CCID Think Tank figure cited at the time of the 2022 listing gave Synopsys, Cadence and Siemens a combined 80 percent of the Chinese market in 2020, with Empyrean at about 6 percent as the largest domestic firm [5]. The South China Morning Post put Empyrean at about 5 percent of China's EDA market in December 2024 [2]. The two figures describe the same structural position rather than a trend.

The company claims one clear lead at home: it says it is the only Chinese supplier offering a full-flow 3DIC design and verification solution, and in 2025 it launched an Argus 3DIC physical verification platform covering 2.5D and 3D heterogeneous integration packaging [4]. Advanced packaging is one of the levers Chinese chipmakers can pull while leading-edge lithography remains restricted, which is also why the equipment side, covered in the articles on [SiCarrier](https://aiwiki.ai/wiki/sicarrier) and [NAURA](https://aiwiki.ai/wiki/naura), draws the same policy attention.

## Attempted acquisition of Xpeedic

In March 2025 Empyrean announced a major asset restructuring: it would buy 100 percent of Xpeedic Semiconductor Technology (Shanghai) Co., Ltd., a firm founded in 2010 that specialises in simulation from IC through package to system, from 35 shareholders using a mix of new shares and cash, with matching funds raised from CEC and its subsidiary 中电金投控股有限公司. The plan was disclosed on 30 March 2025. On the evening of 9 July 2025 the company announced that the parties had failed to agree on core terms of the deal and would sign a termination agreement, and it undertook not to plan another major restructuring for one month [6]. English-language summaries that describe the Xpeedic purchase as completed are out of date.

## US export controls

On 5 December 2024 the Bureau of Industry and Security published a final rule adding 140 entities to the Entity List (89 FR 96830, RIN 0694-AJ77, effective 2 December 2024) [3]. Empyrean itself appears under the romanisation of its Chinese legal name, "Beijing Huada Jiutian Technology Co., Ltd.", with five listed aliases: Empyrean, Huada Empyrean, Empyrean Technology, Huada Jiutian and BGI Jiutian. Six regional units were added as well, in Chengdu, Guangzhou, Nanjing, Shanghai, Shenzhen and Xi'an, along with Empyrean Korea under the destination of South Korea. Every entry carries a licence requirement for all items subject to the Export Administration Regulations and a review policy of presumption of denial under section 744.11 [3]. The same rule swept in [NAURA](https://aiwiki.ai/wiki/naura), Piotech, ACM Research (Shanghai), Skyverse and dozens of materials and parts suppliers; the wider sequence is set out in the article on [export controls](https://aiwiki.ai/wiki/export_controls).

Empyrean said the impact was controllable, arguing that its home-grown technology kept its operations intact [2]. A week after the blacklisting, on 9 December 2024, the board handed full control to CEC: four directors resigned, CEC took six of eleven board seats, and CEC, which indirectly held about 34 percent of the equity, moved to consolidate Empyrean's accounts and run it as a direct subsidiary. The stock rose 9 percent to RMB 134 the following day [2].

Controls also ran the other way, briefly. On 29 May 2025 Synopsys received an "is-informed" letter from BIS imposing a licence requirement on exports, re-exports and in-country transfers of EDA software and technology classified under ECCNs 3D991 and 3E991 where a party to the transaction was in China or was a Chinese military end user. BIS rescinded the restriction effective immediately on 2 July 2025, and Synopsys disclosed both the imposition and the reversal in its filings [7][8]. The episode lasted about five weeks. It gave Chinese chip designers a preview of a sustained EDA cutoff, and it gave Empyrean a marketing argument.

## Agentic EDA, September 2026

Liu Weiping spoke at the 2026 International Integrated Circuit Innovation Expo, held from 9 to 11 September 2026 at the Shenzhen World Exhibition and Convention Center alongside the China International Optoelectronic Exposition and elexcon [9]. On Wednesday 9 September, the opening day, he said that applying an AI agent to Empyrean's simulation and layout tools had cut the time needed for a circuit layout task from four weeks to one week [1].

The scope of that claim is narrow. It is about a circuit layout task handled by simulation and layout tools, not about chip design end to end, and it is a company statement relayed by a reporter rather than a measured benchmark.

Liu framed the change as a paradigm shift from "humans operating tools" to "humans commanding agents", and said the industry's business model would follow, moving from the traditional software licence towards pricing based on token consumption with agentic EDA. He said Empyrean was developing an agentic EDA platform that the company considers core to its future strategy, designed so that its own agentic tools can work with partners' agents [1].

The 2025 annual report had already described an "AI plus EDA" programme. Claimed results include a more than two-fold improvement in contour extraction efficiency in the Vision ID wafer image metrology tool, average wafer contour prediction error held under 2 nm in the Vision HP tool, an LLM-based PyAether agent called Aether Coder that handles API search and code generation, and ArgusFPD Triage AI, a false-error filter for flat-panel layout verification that the company says removes 98 percent of same-type false errors in under 30 minutes per 10,000 records [4]. These are company figures and have not been independently reproduced.

The incumbent vendors are on the same path. The South China Morning Post noted that Cadence took its ChipStack AI Super Agent to "Level-5" autonomy in June 2026, a step Cadence hailed as the industry's first autonomous agentic AI design engineer able to independently run complex chip design verification workflows [1]. Machine learning applied to chip design has a longer history than the agent framing suggests: a 2021 Nature paper from Google posed chip floorplanning as a reinforcement learning problem, work later branded [AlphaChip](https://aiwiki.ai/wiki/alphachip) [10], and NVIDIA's [ChipNeMo](https://aiwiki.ai/wiki/chipnemo) adapted large language models to internal chip design data in 2023 [11].

## Policy context

Empyrean's announcement landed alongside a government push. An action plan published by the Ministry of Industry and Information Technology on 11 September 2026 called for deeper integration of AI and software, naming industrial software such as EDA and computer-aided design tools, with the stated goal of moving up to "the high end of the global value chain by 2030". At a press conference the same day, MIIT official Wang Weiwei said the rise of AI was redefining traditional software and its development model, presenting a historic opportunity to reshape the competitive landscape and leapfrog rivals [1].

EDA is cheap for Washington to restrict and slow for Beijing to replace, which is why it keeps drawing policy attention out of proportion to its revenue. A fuller account of the surrounding sector is in [China's semiconductor industry](https://aiwiki.ai/wiki/china_semiconductor_industry), and of the design houses that depend on these tools, from [Huawei](https://aiwiki.ai/wiki/huawei) HiSilicon to the independent [AI accelerator](https://aiwiki.ai/wiki/ai_accelerator) startups.

## References

1. Deng, Iris. "Beijing pushes AI-assisted chip design as part of self-sufficiency drive." South China Morning Post, 13 September 2026. https://www.scmp.com/tech/tech-trends/article/3367245/beijing-pushes-ai-assisted-chip-design-part-self-sufficiency-drive
2. Pan, Che. "China's top chip design tool maker cedes control to state-owned firm after US blacklisting." South China Morning Post, 10 December 2024. https://www.scmp.com/tech/tech-trends/article/3290156/chinas-top-chip-design-tool-maker-cedes-control-state-owned-firm-after-us-blacklisting
3. Bureau of Industry and Security, US Department of Commerce. "Additions and Modifications to the Entity List; Removals From the Validated End-User (VEU) Program." Final rule, 89 FR 96830, 5 December 2024 (RIN 0694-AJ77). https://www.govinfo.gov/content/pkg/FR-2024-12-05/html/2024-28267.htm
4. Beijing Empyrean Technology Co., Ltd. "2025 Annual Report Summary" (北京华大九天科技股份有限公司 2025 年年度报告摘要), announcement dated 28 April 2026. https://stock.stockstar.com/notice/SN2026042800013318.shtml
5. Dong Wenshu. "国内EDA龙头华大九天上市，董事长曾参与研发'熊猫'系统." 市界, via Tencent News, 29 July 2022. https://news.qq.com/rain/a/20220729A08RGE00
6. Song Jianan. "核心条款未达成一致，华大九天终止收购芯和半导体." 界面新闻, via Securities Times (证券时报), 10 July 2025. https://www.stcn.com/article/detail/2497811.html
7. Synopsys, Inc. Form 10-Q for the quarterly period ended 31 July 2025, US Securities and Exchange Commission. https://www.sec.gov/Archives/edgar/data/883241/000088324125000024/snps-20250731.htm
8. Synopsys, Inc. "Synopsys Issues Statement in Connection to the Lifting of Recent U.S. Export Restrictions Related to China." 2 July 2025. https://news.synopsys.com/2025-07-02-Synopsys-Issues-Statement-in-Connection-to-the-Lifting-of-Recent-U-S-Export-Restrictions-Related-to-China
9. "Connecting the Full Semiconductor Value Chain: International Integrated Circuit Innovation Expo Returns to Shenzhen This September." IICIE 2026 organisers, 22 May 2026. https://www.iicieexpo.com/en/news/1670_info.html
10. Mirhoseini, Azalia, et al. "A graph placement methodology for fast chip design." Nature, 2021. https://www.nature.com/articles/s41586-021-03544-w
11. Liu, Mingjie, et al. "ChipNeMo: Domain-Adapted LLMs for Chip Design." arXiv:2311.00176, 31 October 2023. https://arxiv.org/abs/2311.00176