# Extropic

> Source: https://aiwiki.ai/wiki/extropic
> Updated: 2026-09-06
> Fact-checked: 2026-09-06
> Categories: AI Companies, AI Hardware
> License: CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/) - attribute to "AI Wiki (aiwiki.ai)"
> Cite as: AI Wiki. "Extropic." aiwiki.ai, 6 Sept 2026. https://aiwiki.ai/wiki/extropic
> From AI Wiki (https://aiwiki.ai), the free encyclopedia of artificial intelligence. Reuse freely with attribution.

Extropic (Extropic Corp.) is an American computing hardware company, founded in 2022 by Guillaume Verdon, that designs what it calls thermodynamic sampling units (TSUs): chips built from ordinary CMOS transistors that use the thermal noise inside those transistors to draw samples from programmable probability distributions, rather than executing deterministic arithmetic [1][9]. The company presents this as a more energy-efficient substrate for generative AI than the [GPU](https://aiwiki.ai/wiki/gpu), on the argument that generative models are ultimately sampling procedures and that GPUs are built for dense matrix multiplication rather than sampling [10]. Its published roadmap runs from the X0 prototype chip (first quarter of 2025) and the XTR-0 development platform (third quarter of 2025) to Z1, a chip the company described in August 2026 as taped out with more than a quarter million probabilistic bits, and on to Z1 sticks, accelerator cards and a planned billion-pbit cluster, with early access targeted for 2027 [14][18].

Extropic raised a $14.1 million seed round in December 2023 [2][3] and on July 29-30, 2026 announced a non-binding letter of intent with the U.S. Department of Commerce for up to $75 million through the CHIPS Research and Development Office [16][17]. Its THRML simulation library and Torx programming framework are released under the [Apache License 2.0](https://aiwiki.ai/wiki/apache_license), and on September 4, 2026 the company published Z1T, a family of sparse [transformer](https://aiwiki.ai/wiki/transformers)-like models built for the Z1 graph, with open weights on [Hugging Face](https://aiwiki.ai/wiki/hugging_face) [23][24][26][27]. The efficiency multipliers the company has published for its systems are simulation-based or theoretical estimates rather than measurements on production silicon; the company says as much in its own posts, and this article repeats the caveat wherever it repeats a number [9][26].

## Background: sampling instead of multiplying

Extropic's founding argument is that energy, not transistor count, is the binding constraint on AI scaling, and that the constraint follows from how digital chips are built. According to the company's October 2025 launch post, most of the energy budget of a CPU or GPU goes to communication, because moving bits around a chip means charging wires, and neither wire capacitance nor signalling voltage has shrunk much in a decade [9]. The company's answer is a chip in which memory and compute are not separated: information is stored and processed in place, and circuits only talk to physically adjacent circuits [9][10].

The second half of the argument is about algorithms. Extropic's "TSU 101" explainer states that all generative AI algorithms are procedures for sampling from probability distributions, that training corresponds to inferring the distribution underlying the data, and that inference corresponds to drawing samples from it. In the company's telling, modern models do a great deal of matrix multiplication to produce a vector of probabilities and then sample from that vector; it says this is a result of a decade of co-evolution between algorithms and GPUs rather than of design, and that GPUs are "really bad at sampling and really good at matrix multiplication" [10]. A TSU is meant to skip the multiplication and sample directly [9].

The 2024 litepaper framed the same idea through biology and thermodynamics: chemical reaction networks inside cells compute with countable numbers of molecules, so their dynamics are dominated by intrinsic randomness, which the company took as evidence that "there is no fundamental reason for the constraints of digital logic to bind the efficiency of computing devices" [5]. Energy-based models were singled out because they appear in both statistical physics (as parameterized thermal states) and in machine learning (as exponential families), and because sampling from them is exactly what digital hardware does badly [5].

## History

### Founding and seed round (2022-2023)

Extropic was founded in 2022 by Guillaume Verdon, who was previously the quantum technology lead in the Physics and AI team at Alphabet's X and who, during his PhD at the University of Waterloo, founded the project that became [Google](https://aiwiki.ai/wiki/google)'s [TensorFlow](https://aiwiki.ai/wiki/tensorflow) Quantum library before joining Google Quantum AI [2][4]. BetaKit reported, citing The Information, that the company had earlier been known as Qyber [4]. The company's own account of its origins describes "a scientific exodus from [quantum computing](https://aiwiki.ai/wiki/quantum_computing)": as timelines to scalable quantum computers lengthened, the team looked for "a different path to practical physics-based computing", one "not reliant on quantum mechanics, one where noise is an asset rather than a liability" [2].

On December 4, 2023 Extropic announced a $14.1 million seed round led by Steve Jang and Kindred Ventures, with participation from Buckley Ventures, HOF Capital, Julian Capital, Marque VC, OSS Capital, Valor Equity Partners, Weekend Fund and others [2][3]. The company's post listed angel investors including [Aidan Gomez](https://aiwiki.ai/wiki/aidan_gomez) and Ivan Zhang of [Cohere](https://aiwiki.ai/wiki/cohere), [Amjad Masad](https://aiwiki.ai/wiki/amjad_masad) of [Replit](https://aiwiki.ai/wiki/replit), Arash Ferdowsi of Dropbox, [Aravind Srinivas](https://aiwiki.ai/wiki/aravind_srinivas) of [Perplexity](https://aiwiki.ai/wiki/perplexity), Balaji Srinivasan, Bryan Johnson, Chris Prucha of Notion, Garry Tan of [Y Combinator](https://aiwiki.ai/wiki/y_combinator), Naval Ravikant, Oliver Cameron, Packy McCormick, Scott Belsky of [Adobe](https://aiwiki.ai/wiki/adobe) and Tobias Lutke of [Shopify](https://aiwiki.ai/wiki/shopify) [2][4]. SiliconANGLE described the round as coming from a startup "led by former members of Alphabet Inc.'s quantum computing research team" and noted that the announcement post said little about the technology beyond "a novel full-stack paradigm of physics-based computing" that "harnesses out-of-equilibrium thermodynamics" [3].

The same month, Forbes identified Verdon as the person behind the pseudonymous X account Based Beff Jezos, associated with the [effective accelerationism](https://aiwiki.ai/wiki/effective_accelerationism) movement; BetaKit reported the identification in its coverage of the round [4]. Wired later described Verdon as "the man behind the wildly popular, provocative, and sometimes controversial online persona" [7].

### Litepaper and superconducting prototypes (2024)

On March 11, 2024 Extropic published a litepaper, "Ushering in the Thermodynamic Future", signed "Gill and Trev", which gave the first technical description of its plans [5]. At that stage the company's first processors were "nano fabricated from aluminum" and ran at low temperatures where they were superconducting, using Josephson junctions as the nonlinear element needed to reach non-Gaussian distributions; the litepaper said these passive superconducting chips were aimed at "low-volume, high-value customers like governments, banks, and private clouds" [5]. In parallel, the litepaper said, Extropic was building room-temperature semiconductor devices that "trade the Josephson junction for the transistor", sacrificing some efficiency in exchange for standard manufacturing processes and a GPU-like expansion-card form factor [5]. Tom's Hardware covered the litepaper under the headline that the startup had emerged from stealth "with superconducting processors it boldly claims will beat GPUs, CPUs, and TPUs" [6].

Every chip the company has shown publicly since then (X0 and Z1) is an all-transistor CMOS device, and the company's later writing describes its probabilistic circuits as "made entirely of transistors" [9][11]. The sources reviewed for this article do not say what became of the superconducting line.

### X0, XTR-0 and the October 2025 launch

Wired's Will Knight reported on March 26, 2025 that Extropic had shared an oscilloscope trace of a probabilistic bit flipping between 1 and 0, with a controllable probability of being in either state, and that the company aimed to deliver a chip "three to four orders of magnitude more efficient than today's hardware"; the article also noted that thermodynamic computing efforts had traditionally relied on superconducting circuits, whereas Verdon and his cofounder Trevor McCourt were "using fluctuations of electric charge in regular silicon instead" [7].

On October 29, 2025 Extropic published three posts ("Thermodynamic Computing: From Zero to One", "TSU 101" and "Inside X0 and XTR-0"), released the THRML simulation library, and posted a paper on a probabilistic hardware architecture for [diffusion-like models](https://aiwiki.ai/wiki/diffusion_model) to arXiv [9][10][11][12]. The launch post claimed the company had "designed the world's first scalable probabilistic computer", had "fabricated probabilistic circuits that perform sampling tasks using orders of magnitude less energy than the current state of the art", and had developed a generative algorithm (the Denoising Thermodynamic Model) that in simulation could use "orders of magnitude less energy than existing algorithms" [9]. Wired's same-day report said the first working chip had been shared with "a handful of partners, including frontier AI labs, startups working on weather modeling, and representatives from several governments", none of which Extropic would name, and quoted Johan Mathe, CEO of the weather-forecasting startup Atmo, as one early tester [8]. The Wired piece also described the forthcoming chip as "Z-1", said Extropic claimed it could deliver the chip "next year", and gave its size as 250,000 p-bits [8]; the chip Extropic described in August 2026 has 269,568 pbits and is targeted for early access in 2027 [18].

### CHIPS letter of intent (July 2026)

On July 29, 2026 (company post) and July 30, 2026 (PRNewswire release), Extropic announced that it had signed a letter of intent with the U.S. Department of Commerce for up to $75 million in funding through the CHIPS Research and Development Office (CRDO) [16][17]. Under the letter, the planned funding would support bringing the first Z1 clusters online, demonstrating chip performance on generative-AI benchmarks, and building the systems needed to control TSUs and integrate them with conventional computing at rack scale [16]. The capstone of the project is a chip called Z1.5, "an iteration over Z1, but now fabricated at a U.S. foundry" [16]. The release states that the letter is non-binding and that the funding "remains subject to the negotiation of definitive agreements with the Department of Commerce and the achievement of project milestones" [17]. It also disclosed that two X0 variants had been taped out and tested at two different fabs, and that TSUs can be made on mature process nodes because they extract computation from far fewer transistors by operating them probabilistically [16]. The office administers the research and development funding created by the [CHIPS and Science Act](https://aiwiki.ai/wiki/chips_act).

The release quoted Secretary of Commerce Howard Lutnick and Bill Frauenhofer, Executive Director for Semiconductor Innovation and Investment at the Department of Commerce, and gave the company's headquarters as Waltham, Massachusetts, with offices in San Francisco [16][17].

### Z1 and the summer 2026 update

On August 3, 2026 (the date given on the company's writing index; the post itself is labelled "Summer 2026 Announcement") Extropic published "From One to One Billion: Torx, Thermalizers, and Z1" [18][19]. The post revealed Z1, said the chip was "finally taped out", introduced the Torx framework and the Thermalizers compiler whitepaper, opened an early-access API for GPU simulators of Torx and THRML programs, and set 2027 as the early-access window for Z1 sticks, cards and clusters [18]. Two arXiv papers accompanied it: "A Framework for Stochastic Differentiable Programming" and "Thermalizing Stochastic Programs" [20][21]. The post also said the company had, "three years ago", set out "to scale our systems 1000x year over year" [18].

### Z1T (September 2026)

On September 4, 2026 Extropic published "Z1T: Sparse Transformer-Like Models for Probabilistic Hardware", its first family of transformer-like models, after earlier public work centered on probabilistic graphical models and diffusion-like models, together with open weights for a model called Z1T-0 and an open training recipe [26][27][25]. The company's X post summarized it as "up to 140x energy efficiency gains over GPUs" and "a new scaling law for sparse transformers" [28]. The release is summarized below.

### Timeline

| Date | Event | Source |
|------|-------|--------|
| 2022 | Extropic founded by Guillaume Verdon | [1][2] |
| Dec 4, 2023 | $14.1 million seed round announced, led by Kindred Ventures | [2][3] |
| Mar 11, 2024 | Litepaper "Ushering in the Thermodynamic Future"; superconducting prototypes and planned room-temperature transistor devices | [5] |
| Q1 2025 | X0 silicon prototype (company hardware page) | [14] |
| Mar 26, 2025 | Wired publishes p-bit oscilloscope trace and the "three to four orders of magnitude" aim | [7] |
| Q3 2025 | XTR-0 experimental platform (company hardware page) | [14] |
| Sep 16, 2025 | THRML repository created on GitHub | [23] |
| Oct 28-29, 2025 | Diffusion-like-model hardware paper on arXiv; public launch of X0, XTR-0 and THRML | [9][12] |
| Jul 2, 2026 | Diffusion-like-model paper published in npj Unconventional Computing | [13] |
| Jul 8, 2026 | Torx repository created on GitHub | [24] |
| Jul 17, 2026 | "Blueprint for Equilibrium-Based Differentiable Continuous-Variable Thermodynamic Computing" on arXiv | [22] |
| Jul 29-30, 2026 | $75 million CHIPS R&D letter of intent announced | [16][17] |
| Aug 3, 2026 | "From One to One Billion": Z1 revealed as taped out; Torx released; Thermalizers whitepaper; simulator API | [18][19] |
| Sep 4, 2026 | Z1T research post, Z1T-0 open weights, sparse-transformers code | [26][27][25] |
| 2027 (planned) | Early access to Z1 sticks, cards and a billion-pbit cluster | [14][18] |

## Technology

### Thermodynamic sampling units

Extropic calls its chips sampling units rather than processing units because, in its description, they perform a different kind of operation: the inputs are parameters that define the shape of a probability distribution, and the outputs are samples from that distribution [10]. Specifically, a TSU samples from an energy-based model (EBM), a model that defines a probability distribution through an energy function, with lower-energy states being more probable [9]. To use a TSU for machine learning, the parameters of the energy function are fitted so that the model matches real data [9].

Architecturally, a TSU is a large array of sampling cells connected only to their physical neighbors. Each node of a probabilistic graphical model maps to one hardware cell and each edge to a wire between two cells; a cell receives its neighbors' states, computes the parameters of its update distribution, biases a probabilistic circuit accordingly, samples its new state and stores it in a register so neighbors can read it [10]. The company's statement of the resulting advantage is that a TSU "stores and processes information in place", lowering the energetic losses that in a conventional von Neumann design come from shuttling bits to memory and back [18]. The company also says designs of this general kind have "existed in academia for decades" and that its contribution is a scalable version that can be built in standard semiconductor processes [10]; the Z1T post describes the encoding approach as drawing on "the Boltzmann-machine lineage of neural computation", citing Ackley, Hinton and Sejnowski's 1985 [Boltzmann machine](https://aiwiki.ai/wiki/boltzmann_machine) paper [26]. The wider field, including other companies pursuing related ideas such as [Normal Computing](https://aiwiki.ai/wiki/normal_computing), is covered at [thermodynamic computing](https://aiwiki.ai/wiki/thermodynamic_computing).

### Probabilistic bits and other primitives

The basic circuit is the probabilistic bit, or pbit. In Extropic's description it outputs a voltage that wanders randomly between a high level (logical 1) and a low level (logical 0); a single control voltage sets the probability of finding it in the 1 state, so the pbit is a hardware implementation of a Bernoulli distribution, "like flipping a weighted coin" [10][11][14]. Reading the output voltage takes a sample, and waiting long enough between reads yields approximately independent samples; the company reports a relaxation time of roughly 100 nanoseconds for one X0 pbit design, and says the figure can range from about a millisecond to about a nanosecond depending on the circuit and process [11]. Extropic's claim for the pbit is that it performs "millions to hundreds of millions" of such coin flips per second "using 10,000x less energy than a single floating-point add per flip" [11]; this is a company statement whose measurement basis the post does not detail.

The company says academic pbit designs generally rely on exotic components or unproven fabrication processes, and that its own contribution was several years of work on new models of noise in transistor circuits that let it design a pbit "made entirely of transistors" [9][11]. X0 also carries other primitives:

| Primitive | Distribution sampled | Description (per Extropic) | Source |
|-----------|---------------------|-----------------------------|--------|
| pbit | Bernoulli | Programmable weighted coin flip; one control voltage sets the probability of a 1 | [11][14] |
| pdit | Categorical (k states) | Signal jumps between k discrete levels, "an electronic source of loaded dice rolls"; k-1 control parameters | [11] |
| pmode | Gaussian | Continuous output; XTR-0 exposes 1D and 2D pmodes with programmable variance or correlation | [11] |
| pMoG | Gaussian mixture | Jumps between several levels with programmable position, spread and weight of each mode | [11] |

### Energy-based models, the Ising model and Gibbs sampling

The way many pbits become a useful computer is through Gibbs sampling, which Extropic's "TSU 101" post explains with a two-variable example [10]. Two binary variables, each taking the value -1 or +1, have four joint states; an energy function with two bias parameters and one coupling parameter assigns each state an energy, and the probability of a state is proportional to the exponential of minus its energy. Positive biases push each variable toward +1; a positive coupling pushes the two variables to agree [10]. Computing the actual probabilities requires a normalizing constant obtained by summing over every state, which for N binary variables means 2 to the power N evaluations and quickly becomes intractable [10]. Gibbs sampling avoids the constant: each variable is repeatedly resampled from its distribution conditioned on its neighbors, which for a binary variable is a Bernoulli draw whose probability is a sigmoid of the local bias plus the weighted sum of neighbor states, which is exactly what a pbit does [10]. When the graph can be colored so that no two adjacent nodes share a color, every node of one color can be updated in parallel (block or "chromatic" Gibbs sampling); in the bipartite grid of the explainer, half the nodes update at once, and the company says the grid can grow without lengthening each iteration [10][18].

The Z1T post gives the same model in physics language. Z1 samples from a programmable Ising model with energy E(z) = sum over nodes of h_j z_j plus sum over edges of J_jk z_j z_k, with each z in {-1, +1}; the biases h and couplings J are the programmable parameters, and a coupling can only be nonzero where the silicon has a wire, so the coupling matrix is inherently sparse [26]. This is the same family of model treated by [Markov chain Monte Carlo](https://aiwiki.ai/wiki/markov_chain_monte_carlo) methods in software, and the same structure described more generally as a [probabilistic graphical model](https://aiwiki.ai/wiki/probabilistic_graphical_model). The company's explainer points readers to Kevin Murphy's textbook for a rigorous treatment [10].

### Denoising Thermodynamic Models

Extropic's explainer argues that fitting an EBM directly to complex real-world data is "fundamentally a really bad idea", because real data is strongly multimodal and iterative samplers get trapped in local minima, taking time exponential in the height of an energy barrier to cross it; it says earlier work on TSU-like hardware focused on that direct-fit approach and was limited by it [10]. Its alternative, the Denoising Thermodynamic Model (DTM), borrows the structure of a diffusion model: a forward process gradually mixes data with noise, and a chain of learned models reverses it. Where a GPU diffusion model uses a very large number of steps so that each reverse step is simple enough for deterministic hardware, a DTM uses a handful of steps (the paper's DTMs chain two to eight energy-based models) and lets an EBM running on a TSU handle the harder reverse distribution at each step, with the output of one sampling program clamped as the input to the next [10].

In the accompanying paper, posted to arXiv on October 28, 2025 and published in npj Unconventional Computing on July 2, 2026, the authors propose "an all-transistor probabilistic computer that implements powerful denoising models at the hardware level" and report that "a system-level analysis indicates that devices based on our architecture could achieve performance parity with GPUs on a simple image benchmark using approximately 10,000 times less energy" [12][13]. The company's explainer describes the benchmark as a simulated 70-by-70 grid of locally connected sampling cells, a subsection of the Z1 architecture, generating low-resolution Fashion-MNIST clothing images [10]. Extropic funded an independent replication of the paper using THRML and released it as open source [9]. The 10,000x figure is therefore an estimate from a hardware model applied to a small benchmark, not a measurement on a fabricated chip, and the company's own wording ("could be", "simulations") reflects that [9][10].

## Hardware

### Roadmap

| System | Type | Date | Description (company figures) | Source |
|--------|------|------|-------------------------------|--------|
| X0 | Silicon prototype | Q1 2025 | Test chip proving that probabilistic circuits sampling from simple distributions can be made from transistors in a mainstream process; two variants taped out and tested at two fabs | [14][11][16] |
| XTR-0 | Experimental testing and research platform | Q3 2025; publicly revealed Oct 29, 2025 | Desktop platform with a CPU, an FPGA and two sockets for daughterboards carrying Extropic chips; shipped to early adopters and also run as a remote cluster | [14][11][18] |
| Z1 | First production-scale TSU | Reported taped out in the Aug 3, 2026 post | Eight cores, 269,568 pbits, 16-neighbor connectivity, more than 50 MHz sampling rate, under 1 W, die under 12 mm per side | [18][26] |
| Z1 stick | M.2 thermo compute stick | Early access 2027 | Two Z1 chips, more than 500,000 pbits, for edge applications such as augmented reality and robotics | [14][18] |
| Z1 card | PCIe accelerator card | Early access 2027 | 16 Z1 chips, more than 4 million pbits, for workstations and servers alongside other accelerators | [14][18] |
| Z1 cluster | Thermo compute cluster | Planned for 2027 | More than one billion pbits "in one coherent cluster", built from Z1 cards | [18] |
| Z1.5 | Onshore iteration of Z1 | Capstone of the CHIPS project | Same design lineage as Z1, fabricated at a U.S. foundry | [16] |

### X0 and XTR-0

X0 was designed to test Extropic's noise models and probabilistic circuit designs; the company says the experiments showed its models of noise were "largely correct" and that the circuits worked, and that X0 is "too small" to be commercially useful but marks the first time probabilistic circuits made in "an advanced, mainstream, semiconductor process" have been used for any computation [11]. Wired's October 2025 report described each X0 as containing "a handful of p-bits" [8]. The company's 2026 letter-of-intent release adds that two X0 variants were taped out and successfully tested at two different fabs, which it offers as evidence that its primitive circuit IP ports between foundries [16].

XTR-0 packages X0 for users. The company describes it as a CPU, an [FPGA](https://aiwiki.ai/wiki/fpga) and two daughterboard sockets, offering low-latency communication between Extropic chips and a conventional processor; it exposes the pbit, pdit, pmode and pMoG primitives, hides the calibration map from control voltages to distribution parameters (which Extropic measures at the factory), and is meant to accept future chips in the same sockets [11]. In August 2026 the company said it had manufactured "dozens" of XTR-0 systems for early adopters and had built an XTR-0 cluster that scientific and enterprise users could access remotely, which it called "the first thermodynamic computing proto-cloud" [18].

### Z1

Z1 is the chip on which the company's 2026 and 2027 plans rest. The August 2026 post describes it as follows [18]:

| Specification | Company figure |
|---------------|----------------|
| Cores | 8 (each 33,696 pbits, per the Z1T model-details box) |
| Probabilistic bits | 269,568 ("over a quarter million") |
| Connectivity | Sparse graph; each pbit directly connected to 16 neighbors |
| Sampling algorithm | Chromatic Gibbs sampling executed in place, sampling the thermal-equilibrium state of a programmable Ising model |
| Sampling rate | Over 50 MHz (a 50 MHz internal update clock in the Z1T post) |
| Power | Under 1 W |
| Die size | Under 12 mm per side |
| Sampling energy | 1.3e-14 J per sample (Z1T model-details box) |

Sources: [18][26].

The company's two chip descriptions do not agree on the number of programmable couplings. The die caption used in both the August 2026 post and the September 2026 Z1T post reads "eight cores, 269,568 pbits, 215,904 coupling parameters", while the Z1T model-details box gives "8 cores x 33,696 pbits = 269,568 pbits, 2,135,904 hardwired edges" and the Z1T prose says the chip has "a total of 269,568 pbits and 2,135,904 coupling edges on a single chip" [18][26]. A degree-16 graph over 269,568 pbits can hold at most 2,156,544 distinct couplings (269,568 x 16 / 2), which fits the larger figure and not the smaller one; that arithmetic is this article's, not the company's. The figures differ by roughly a factor of ten. This article reports both as published; the pages reviewed for this article do not explain the difference.

The Z1T post also states that Z1 is a "sub-threshold CMOS" chip, that its sparse physical connectivity "is key to its power efficiency and is a hard constraint of the hardware", and that the design of Z1 predates the transformer work and is being used to inform future chips [26]. Extropic argues that in-memory, fixed-degree connectivity is the structural reason for its energy claims: a GPU achieves all-to-all connectivity between cores through a shared cache hierarchy, which is what lets it multiply dense matrices, and a 99 percent sparse multiplication on a GPU "is not 100x faster" [26].

### Z1 systems and the billion-pbit cluster

Extropic plans to sell Z1 in an M.2 "thermo compute stick" (two chips, over half a million pbits) aimed at low-power edge uses such as augmented reality and "physical intelligence", and in a [PCIe](https://aiwiki.ai/wiki/pcie) accelerator card (16 chips, over four million pbits) that "can be slotted right alongside your other favorite accelerators" for heterogeneous "thermo-classical" computing [14][18]. The company says it is building "the world's first large-scale thermodynamic computing cluster" in 2027, a billion-pbit system assembled from Z1 cards, on the reasoning that emergent properties of large differentiable programs only show up empirically at scale [18]. Early access to sticks, cards and clusters is targeted for 2027 [14][18]. The letter-of-intent release describes the same cluster work as the main object of the CHIPS funding: Z1 clusters "large enough to begin exploring thermodynamic AI algorithms at scales impractical to simulate on GPUs today" [16].

Extropic's first-generation systems pair each Z1 with an FPGA on the same board; the Z1T study leans on that pairing, and the company notes the companion processor could in principle be a GPU or another accelerator instead [26].

## Software stack

Extropic has released its software in layers that it maps onto the deep-learning stack: in the company's phrasing, "Torx is to THRML what [PyTorch](https://aiwiki.ai/wiki/pytorch) is to [CUDA](https://aiwiki.ai/wiki/cuda)" [15][18].

| Component | Role | Released | License and repository | Source |
|-----------|------|----------|-----------------------|--------|
| THRML (thrml) | "Thermodynamic Hypergraphical Model Library" in [JAX](https://aiwiki.ai/wiki/jax): simulates probabilistic graphical models and energy-based models on GPUs, can compute gradients to train EBMs, and lets users experiment with alternative TSU connection graphs and node types | Repository created Sep 16, 2025; open-sourced Oct 29, 2025 | Apache-2.0; github.com/extropic-ai/thrml (1,151 stars as of Sep 5, 2026) | [9][15][23] |
| Torx | Open-source framework for "general stochastic differentiable programming": nodes of a directed acyclic graph are stochastic transition kernels with trainable parameters, composed into Parameterized Stochastic Circuits (PSCs) or Directed Factor Graphs; hardware agnostic, runs on XTR-0 and in simulation | Repository created Jul 8, 2026; announced Aug 3, 2026 with a whitepaper | Apache-2.0; github.com/extropic-ai/torx; docs at docs.torx.ai | [18][20][24] |
| Thermalizers | Compiler from Torx programs to thermodynamic hardware: each stochastic kernel is variationally compiled into a hardware-aware EBM, producing a directed graph of THRML models executed by pipeline-parallel sampling; includes "context matching" and trajectory-level REINFORCE post-training to limit compounding error | Whitepaper Aug 3, 2026; open-source release promised "in the coming weeks" | arXiv 2608.01615 | [18][21] |
| Early-access simulator API | Hosted GPU simulators for Torx and THRML programs; the company says it will grow to include faster digital accelerators, agentic research tools and eventually the first Z1 clusters | Live Aug 3, 2026 | Not open source | [18] |
| sparse-transformers | JAX research code for sparse causal transformers and Z1-compilable transformers (the Z1T training recipe) | Repository created Aug 31, 2026; announced Sep 4, 2026 | Apache-2.0; github.com/extropic-ai/sparse-transformers | [25][26] |

The Torx paper describes PSCs as "a gate-based intermediate representation for programmable stochastic dynamics" whose typed kernels and binary, categorical and continuous wires are chosen to match "the native operations exposed by emerging probabilistic hardware", so that the energy advantage of the hardware is not lost in decomposition or communication overhead [20]. The Thermalizers paper analyzes how per-factor compilation error accumulates across a deep program and introduces the two training refinements named above [21]. In its August post the company said that, "for the right workloads", the compiled approach "can deliver up to 10,000x greater energy efficiency than GPUs"; the post does not show the derivation, and the figure should be read as a company estimate [18].

Extropic also funds outside work: its software page offers research grants "particularly [to] early-career researchers and PhD students" and invites partnerships with organizations that run large probabilistic workloads, listing diffusion models, physical simulations, world models, optimization and probabilistic inference (Bayesian filtering, financial modeling) as target applications [15].

## Z1T research release

The Z1T post, dated September 4, 2026 and authored by Guillaume Verdon, Alexander Neagoe, Owen Lockwood and Seth Morton, asks whether Z1 can improve the energy efficiency of transformer inference, given that transformer training and inference "account for an enormous share of the workloads" on digital accelerators [26]. The approach is to keep a digital coprocessor for what Z1 cannot do and to move the sparse, local parts of each layer onto the chip. A detailed treatment is at [Z1T](https://aiwiki.ai/wiki/extropic_z1t); the main points are as follows.

Continuous values are encoded into bundles of four pbits with power-of-two weights, which the company calls dy4p quantization (the spin analogue of a 4-bit probabilistic integer); averaging N samples from the bundle yields an effective precision that grows with N, so precision can be tuned at runtime by taking more samples [26]. The basic unit is a "tanh-linear" cell: a visible pbit coupled to its 16 neighbors has, conditioned on those neighbors, an expected value equal to the hyperbolic tangent of its local field, so a sparse weighted sum fused with a [tanh](https://aiwiki.ai/wiki/tanh) activation falls out of the physics [26]. Standard transformer pieces are then replaced with versions that fit a degree-16 graph: [RMSNorm](https://aiwiki.ai/wiki/rmsnorm) becomes a scaled Dynamic Tanh; softmax attention becomes a gated convolutional attention (GCA) variant in the lineage of the Attention Free Transformer, computed from 4-sparse projections; and MLP layers become compositions of tanh-linear cells [26]. Embedding, pooling, residual additions, certain arithmetic and transcendental functions, and the final vocabulary readout run on the FPGA; Z1 runs the DyT and the sampled projections and samples the next token [26].

The scaling study trains Z1T models of several sizes on OpenWebText with the [GPT-2](https://aiwiki.ai/wiki/gpt-2) tokenizer and, separately, a standard GPT-2-style decoder with a single "connectivity" knob c that fixes the number of nonzero inputs per output and the attention window, sweeping c in {4, 16, 32, 64, 128} plus a dense baseline over training budgets from 3e14 to 1e18 FLOPs [26]. Its findings, as the company reports them, are that the sparse models follow a scaling law "that parallels that of traditional transformers", that dense FLOPs are more efficient than sparse FLOPs at a fixed parameter count (sparser models must be deeper and wider), and that the Z1T architecture needs "about an order of magnitude more FLOPs" than GPT-2 to reach the same loss, with the log-log fit implying about 9.5e19 FLOPs to match GPT-2-small [26]. The company then argues that a sparse FLOP on Z1 costs far less energy than a dense FLOP on a GPU, so the model can reach the same loss "at a fraction of the power" [26]. See [scaling laws](https://aiwiki.ai/wiki/scaling_laws) for the dense-model background.

The efficiency numbers are simulation-based estimates for a small model (four layers, model dimension 512, 11.55 million body parameters), and the post says so: "the following projections are based on theoretical chip energy consumption of Z1 based on our best estimates, which are anchored to reality from our experiments with similar pbits in X0" [26]. They exclude the dense logit readout and data movement between the FPGA and Z1, and they compare against an [NVIDIA H100](https://aiwiki.ai/wiki/nvidia_h100) running the same step densely at assumed utilization levels [26]:

| H100 model FLOPs utilization | H100 energy per token | H100 divided by Z1T system | H100 divided by Z1-only layers |
|------------------------------|-----------------------|----------------------------|--------------------------------|
| 10% | 40.9 microjoules | about 139x | about 4,680x |
| 50% | 8.17 microjoules | about 28x | about 935x |
| 100% | 4.09 microjoules | about 14x | about 468x |

The Z1T estimate is 294.52 nanojoules per token, of which 8.74 nJ is Z1 sampling and 285.78 nJ is FPGA work; including the final logit readout on the FPGA raises the total to roughly 136.4 microjoules per token, which is why that layer is excluded from the headline ratio [26]. The company's own outlook section notes that the FPGA consumes more than 95 percent of the estimated energy and that a chip designed for this workload could, in its estimate, reach "up to 1000x" over GPUs [26]. A conservative latency model gives 58.8 microseconds per token (about 17,000 tokens per second) for the Z1 path against measured H100 batch-1 figures of 702 microseconds in eager PyTorch and 102 microseconds with torch.compile, with the caveat that batching on the GPU would make the H100 "substantially more efficient" and that the company advises using Z1 for decode rather than prefill [26].

The open-weights model, Extropic-AI/Z1T-0, was created on Hugging Face on September 4, 2026; the repository holds a config file, a model.eqx weights file and a loader script, lists no license tag in its model card as of September 5, 2026, and points to the sparse-transformers code, which is Apache-2.0 [25][27]. The post's X announcement rounded the top ratio to "up to 140x" [28].

## Efficiency claims and their basis

Extropic has published several large multipliers over the years. All of them are company estimates from simulations or hardware models rather than measurements of production silicon, and each carries scope limits stated in the source.

| Claim | Where stated | Basis, as stated by Extropic | Source |
|-------|--------------|------------------------------|--------|
| Target of "three to four orders of magnitude" over today's hardware | Wired, Mar 2025 (company aim as reported) | Company aim, no derivation | [7] |
| A pbit flips "using 10,000x less energy than a single floating-point add per flip" | "Inside X0 and XTR-0" | Company statement about its pbit circuit | [11] |
| DTMs on TSUs "could be 10,000x more energy efficient" than GPU image generation | Oct 2025 posts and paper | System-level model of a Z1-like chip, 70x70 simulated cells, Fashion-MNIST | [9][10][12][13] |
| Thermalizers "up to 10,000x greater energy efficiency than GPUs" for "the right workloads" | Aug 2026 post | Not derived in the post | [18] |
| Z1T about 14x to 139x over an H100 per token; Z1-only layers about 468x to 4,680x | Z1T post, Sep 2026 | Theoretical Z1 energy anchored to X0 experiments; FPGA coprocessor; excludes logit readout and data movement; small model | [26] |
| "Up to 1000x" if the FPGA bottleneck were removed | Z1T outlook | Extrapolation from the Z1-only-layer ratios | [26] |
| TSUs "can achieve energy-efficiency gains of orders of magnitude over conventional GPUs" on "key generative-AI workloads" | LOI release | Company statement | [16][17] |

## Funding and government support

| Date | Amount | Type | Lead and participants | Source |
|------|--------|------|-----------------------|--------|
| Dec 4, 2023 | $14.1 million | Seed round | Led by Kindred Ventures (Steve Jang); Buckley Ventures, HOF Capital, Julian Capital, Marque VC, OSS Capital, Valor Equity Partners, Weekend Fund; angels listed above | [2][3][4] |
| Jul 29-30, 2026 | Up to $75 million | Non-binding letter of intent, CHIPS Research and Development Office, U.S. Department of Commerce | Subject to definitive agreements and project milestones; funds Z1 clusters, benchmark demonstrations and the Z1.5 chip at a U.S. foundry | [16][17] |

No later equity round appears in the sources reviewed for this article as of September 5, 2026.

## Leadership and team

Guillaume Verdon is the founder and CEO [1][16]. According to the company, he holds a master's degree from the Perimeter Institute and the Institute for Quantum Computing, did his PhD at the University of Waterloo, founded what became TensorFlow Quantum, joined Google Quantum AI and then led quantum technology in the Physics and AI team at Alphabet's X [2]. BetaKit describes him as Canadian and adds McGill University to his education [4]. He is also the person behind the Based Beff Jezos persona, as reported by Forbes and relayed by BetaKit and Wired [4][7].

Trevor McCourt is co-founder and chief technology officer [3][8]. The company's account is that he trained as a mechanical engineer, met Verdon on the founding team of TensorFlow Quantum at Waterloo, moved to hardware and control work at Google Quantum AI, and did PhD work at [MIT](https://aiwiki.ai/wiki/mit) on the role of noise in computational and living systems [2]. He is a co-author of the diffusion-like-model paper [12].

Christopher Chamberland was named principal architect in the December 2023 announcement, which described him as having led quantum architecture and roadmap efforts at [Amazon Web Services](https://aiwiki.ai/wiki/amazon_web_services) and IBM Quantum, after earlier work at Microsoft Quantum and a PhD at Waterloo's Institute for Quantum Computing [2]; he is a co-author of the July 2026 blueprint paper [22]. The company's About page says its founders and team bring experience from Google, IBM, [Apple](https://aiwiki.ai/wiki/apple) and [Microsoft](https://aiwiki.ai/wiki/microsoft), and the 2023 post listed prior employers including AWS, [Meta](https://aiwiki.ai/wiki/meta_ai), [Nvidia](https://aiwiki.ai/wiki/nvidia) and the quantum company Xanadu [1][2]. The Z1T post is signed from "Extropic San Francisco"; the company's press release gives Waltham, Massachusetts as headquarters, and the 2025 launch post refers to building efficient computers "in a garage outside Boston" [9][17][26].

## Investors and advisors

Extropic's About page carries a "Selected Investors & Advisors" list, reproduced here with the affiliations the company gives [1]:

| Name | Affiliation (as listed by Extropic) |
|------|-------------------------------------|
| Amjad Masad | Replit |
| Aidan Gomez | Cohere |
| Balaji Srinivasan | Entrepreneur |
| Naval Ravikant | AngelList |
| Aravind Srinivas | Perplexity |
| Ari Emmanuel | Endeavor |
| Scott Belsky | Adobe |
| Garry Tan | YC |
| Logan Kilpatrick | [Google DeepMind](https://aiwiki.ai/wiki/google_deepmind) |

The page does not distinguish investors from advisors. The seed-round announcement gives the fuller list of institutional and angel investors summarized in the History section [2].

## Coverage and reception

Wired's Will Knight has covered the company twice. The March 26, 2025 piece, "How Extropic Plans to Unseat Nvidia", called Extropic "not a normal startup", relayed the company's aim of a three-to-four-order-of-magnitude efficiency gain, and quoted Verdon on Monte Carlo simulation as "the most computationally-hungry workloads", while noting that the founders "concede that the idea of taking on Nvidia and other chipmakers might seem, on the face of it, absolutely insane" [7]. The October 29, 2025 piece, "Extropic Aims to Disrupt the Data Center Bonanza", reported the first working hardware, described XTR-0 as an FPGA plus two X0 chips "each of which contains a handful of p-bits", quoted McCourt ("We have a machine-learning primitive that is far more efficient than matrix multiplication. The question is, how do you build something on the scale of [ChatGPT](https://aiwiki.ai/wiki/chatgpt) or [Midjourney](https://aiwiki.ai/wiki/midjourney)") and Vincent Weisser of [Prime Intellect](https://aiwiki.ai/wiki/prime_intellect), who said the approach "could prove transformative over the next decade" if scaled practically [8]. The same article refers to the simulation library as "TRHML"; the company's name for it is THRML [8][23].

SiliconANGLE and BetaKit covered the 2023 seed round, the latter noting the company's Canadian founders and its earlier name [3][4]. Tom's Hardware covered the 2024 litepaper and its superconducting prototype [6]. The company's own site lists further media appearances, including a Lex Fridman podcast episode dated December 29, 2023 and a TED AI San Francisco talk in March 2025 [19]. The October 2025 launch video is listed on the company's media index, and the Z1T post links to a Z1 launch video [19][26].

The company's announcements and its technical posts are written in different registers. The seed announcement was written as a "transmission from the future", its launch post opens "We were right", and the Z1 post invites developers to "join the Thermo AI algorithmic rebellion" [2][9][18]. The technical posts are explicit that the company's efficiency numbers are simulation-based, that X0 is too small to be useful commercially, that dense FLOPs beat sparse FLOPs at fixed parameter count, and that batched GPU inference would be "substantially more efficient" than the Z1 path in its own latency comparison [10][11][26]. The sources reviewed for this article contain no independent measurement of a Z1 chip; the company's own posts describe Z1 as taped out, with systems built on it due for early access in 2027 [18].

## References

1. [About | Extropic](https://extropic.ai/about) - Extropic, accessed September 5, 2026.
2. [Extropic assembles itself from the future (seed round announcement)](https://web.archive.org/web/2024/https://www.extropic.ai/accelerate) - Extropic, December 4, 2023 (Wayback Machine capture).
3. [Extropic raises $14.1M to build 'physics-based computing' hardware for generative AI](https://siliconangle.com/2023/12/04/extropic-raises-14-1m-build-physics-based-computing-hardware-generative-ai/) - SiliconANGLE (Maria Deutscher), December 4, 2023.
4. [Founded by Alphabet alums, Canadian-led AI hardware startup Extropic secures over $14 million](https://betakit.com/founded-by-alphabet-alums-canadian-led-ai-hardware-startup-extropic-secures-over-14-million/) - BetaKit (Josh Scott), December 8, 2023.
5. [Ushering in the Thermodynamic Future (Litepaper)](https://web.archive.org/web/2024/https://www.extropic.ai/future) - Extropic, March 11, 2024 (Wayback Machine capture).
6. [AI startup Extropic emerges from stealth with superconducting processors it boldly claims will beat GPUs, CPUs, and TPUs](https://www.tomshardware.com/tech-industry/artificial-intelligence/ai-startup-extropic-emerges-from-stealth-with-superconducting-processors-it-boldly-claims-will-beat-gpus-cpus-and-tpus) - Tom's Hardware (Mark Tyson), March 19, 2024.
7. [How Extropic Plans to Unseat Nvidia](https://www.wired.com/story/how-extropic-plans-to-unseat-nvidia/) - Wired (Will Knight), March 26, 2025.
8. [Extropic Aims to Disrupt the Data Center Bonanza](https://www.wired.com/story/extropic-aims-to-disrupt-the-data-center-bonanza/) - Wired (Will Knight), October 29, 2025.
9. [Thermodynamic Computing: From Zero to One](https://extropic.ai/writing/thermodynamic-computing-from-zero-to-one) - Extropic, October 29, 2025.
10. [TSU 101: An Entirely New Type of Computing Hardware](https://extropic.ai/writing/tsu-101-an-entirely-new-type-of-computing-hardware) - Extropic, October 29, 2025.
11. [Inside X0 and XTR-0](https://extropic.ai/writing/inside-x0-and-xtr-0) - Extropic, October 29, 2025.
12. [An efficient probabilistic hardware architecture for diffusion-like models (arXiv:2510.23972)](https://arxiv.org/abs/2510.23972) - arXiv (Andraž Jelinčič, Owen Lockwood, Akhil Garlapati, Peter Schillinger, Isaac Chuang, Guillaume Verdon, Trevor McCourt), October 28, 2025.
13. [An efficient probabilistic hardware architecture for diffusion-like models](https://doi.org/10.1038/s44335-026-00075-3) - npj Unconventional Computing, volume 3, article 30 (Jelinčič et al.), July 2, 2026.
14. [Hardware | Extropic](https://extropic.ai/hardware) - Extropic, accessed September 5, 2026.
15. [Software | Extropic](https://extropic.ai/software) - Extropic, accessed September 5, 2026.
16. [Extropic Signs $75 Million Letter of Intent with U.S. Department of Commerce to Scale and Onshore Thermodynamic Computing](https://extropic.ai/writing/thermodynamic-computing-chips-in-america) - Extropic, July 29, 2026.
17. [Extropic Signs $75 Million Letter of Intent with U.S. Department of Commerce to Scale and Onshore Thermodynamic Computing](https://www.prnewswire.com/news-releases/extropic-signs-75-million-letter-of-intent-with-us-department-of-commerce-to-scale-and-onshore-thermodynamic-computing-302839290.html) - PR Newswire (Extropic Corp.), July 30, 2026.
18. [From One to One Billion: Torx, Thermalizers, and Z1](https://extropic.ai/writing/from-one-to-one-billion) - Extropic, August 3, 2026.
19. [Extropic | Home](https://extropic.ai/) - Extropic, accessed September 5, 2026 (writing and media index with dates).
20. [A Framework for Stochastic Differentiable Programming (arXiv:2608.01612)](https://arxiv.org/abs/2608.01612) - arXiv (Guillaume Verdon, Leo Tyrpak, Owen Lockwood, Seth Morton, Alexander Neagoe, Anton Sugolov, Ian MacCormack, Mirko Amico), August 3, 2026.
21. [Thermalizing Stochastic Programs (arXiv:2608.01615)](https://arxiv.org/abs/2608.01615) - arXiv (Mirko Amico, Andraž Jelinčič, Colin Oscar Nancarrow, Leo Tyrpak, David Roberts, Seth Morton, Dalton Sakthivadivel, Ashwin Gopal, Guillaume Verdon), August 3, 2026.
22. [A Blueprint for Equilibrium-Based Differentiable Continuous-Variable Thermodynamic Computing (arXiv:2607.16183)](https://arxiv.org/abs/2607.16183) - arXiv (Owen Lockwood, Jérémy Béjanin, Joost Bus, Christopher Chamberland, Patrick Huembeli, Frank Schäfer, Guillaume Verdon), July 17, 2026.
23. [extropic-ai/thrml: Thermodynamic Hypergraphical Model Library in JAX](https://github.com/extropic-ai/thrml) - GitHub (Extropic), repository created September 16, 2025, accessed September 5, 2026.
24. [extropic-ai/torx: JAX Framework for Parameterized Stochastic Circuits (PSCs) and Directed Factor Graphs (DFGs) of Kernels](https://github.com/extropic-ai/torx) - GitHub (Extropic), repository created July 8, 2026, accessed September 5, 2026.
25. [extropic-ai/sparse-transformers: Sparse Transformers in JAX](https://github.com/extropic-ai/sparse-transformers) - GitHub (Extropic), repository created August 31, 2026, accessed September 5, 2026.
26. [Z1T: Sparse Transformer-Like Models for Probabilistic Hardware](https://extropic.ai/writing/z1t) - Extropic (Guillaume Verdon, Alexander Neagoe, Owen Lockwood, Seth Morton), September 4, 2026.
27. [Extropic-AI/Z1T-0](https://huggingface.co/Extropic-AI/Z1T-0) - Hugging Face (Extropic), created September 4, 2026, accessed September 5, 2026.
28. [Introducing Z1T (post by @extropic)](https://x.com/extropic/status/2095935171312996562) - X (Extropic), September 4, 2026.