# Jim Keller

> Source: https://aiwiki.ai/wiki/jim_keller
> Updated: 2026-07-24
> Fact-checked: 2026-07-24
> Categories: AI Companies, AI Hardware, Computer Science, People
> License: CC BY 4.0 (https://creativecommons.org/licenses/by/4.0/) - attribute to "AI Wiki (aiwiki.ai)"
> Cite as: AI Wiki. "Jim Keller." aiwiki.ai, 24 Jul 2026. https://aiwiki.ai/wiki/jim_keller
> From AI Wiki (https://aiwiki.ai), the free encyclopedia of artificial intelligence. Reuse freely with attribution.

Jim Keller is a microprocessor architect who has led or co-led the design of several widely used processor families over four decades, and who has been chief executive of [Tenstorrent](https://aiwiki.ai/wiki/tenstorrent) since January 2023.[1][2] His career includes Digital Equipment Corporation's Alpha processors, the [AMD](https://aiwiki.ai/wiki/amd) K7 and K8 designs, the second of which introduced the x86-64 instruction set, the low-power [Apple](https://aiwiki.ai/wiki/apple) chips that began the A-series, AMD's Zen recovery, [Tesla](https://aiwiki.ai/wiki/tesla)'s first custom self-driving chip, and a two-year term running silicon engineering at [Intel](https://aiwiki.ai/wiki/intel).[1][3][4]

At Tenstorrent he oversees a different bet: AI hardware built from grids of small [RISC-V](https://aiwiki.ai/wiki/risc_v) processors feeding tensor engines, sold both as boards and systems and as licensable design IP, with an open-source software stack instead of a proprietary one.[1][5] The company closed a Series D of more than $693 million in December 2024 at a $2 billion pre-money valuation, with Samsung Securities and AFW Partners leading and Bezos Expeditions among the participants.[6]

He argues in public that Nvidia's software lock-in is less durable than the market assumes. In February 2024 he wrote on X that "Cuda's a swamp, not a moat. x86 was a swamp too," a line that circulated widely in trade coverage.[7][8]

## Career at a glance

| Period | Organization | Role | Principal work |
|---|---|---|---|
| c. 1980-1982 | Harris Corporation | Logic designer | Test equipment repair, a 40 MHz Schottky TTL board for a fiber optic transmitter[1] |
| 1982-1998 | Digital Equipment Corporation | Engineer, later corporate consulting engineer | VAX 8800 logic design; co-architect of Alpha EV5 and EV6[1][3][11] |
| 1998-1999 | AMD | Architect | K7 (Athlon) contributions, started the K8 project, principal author of the x86-64 and HyperTransport specifications[1][3][11] |
| 1999-c. 2004 | SiByte, then Broadcom | Chief architect | MIPS-based networking systems on chip[1][3] |
| c. 2004-2008 | P.A. Semi | Vice president of design | Out-of-order PowerPC networking and general-purpose SoC[1][3] |
| 2008-2012 | Apple | Director, platform architecture | Custom low-power mobile silicon including the A4 and A5[3][4] |
| 2012-2015 | AMD | Corporate vice president and chief architect of microprocessor cores | Zen and the K12 ARM core[3] |
| 2016-2018 | Tesla | Vice president, Autopilot and low-voltage hardware | The chip that shipped as Hardware 3[1][4][33] |
| 2018-2020 | Intel | Senior vice president, silicon engineering | SoC development and integration, design flow modernization[1][4][9] |
| 2021-present | Tenstorrent | President and CTO, then CEO from January 2023 | RISC-V and Tensix AI processors[1][2][10] |

## Early life and education

Keller was born in New Jersey and grew up near Valley Forge, Pennsylvania, where his father worked at GE Aerospace designing satellites. He was the second of six children. In a 2024 oral history recorded by the Computer History Museum, he described being dyslexic and not learning to read until the end of third grade, something his parents never treated as a crisis.[1]

He enrolled at Pennsylvania State University in 1976 and studied electrical engineering, taking one Fortran course and one logic design course along the way.[1] A 2024 profile gives 1980 as the year of his bachelor's degree.[11] His first job was at Harris Corporation in Florida, chosen partly because he thought he could live on the beach and surf. The manager who hired him was fired before he arrived, nobody in the building knew what to do with him, and he spent roughly eighteen months fixing broken equipment and boards. One of those repairs, a 40 MHz Schottky TTL board that encoded data for a fiber optic transmitter, is the reason he was later hired as a clock designer at Digital Equipment Corporation, a job he found through an advertisement in the back of EE Times.[1]

## Digital Equipment Corporation and the Alpha

Keller spent about fifteen years at DEC. The first half was in a mid-range systems group doing emitter-coupled logic design, where he worked as a board and logic designer on the VAX 8800 and built the bus interface.[1] Around 1989 or 1990 he moved to the semiconductor group, after a six-month stay at DEC's Western Research Laboratory in Palo Alto.[1]

There he became co-architect, with Pete Bannon, of EV5, the second Alpha chip, a four-wide in-order machine with a multi-level on-chip cache. He has described EV5 as both the fastest microprocessor built at the time and a design whose mistakes embarrassed him for years.[1] For the follow-on, EV6, he and Dirk Meyer built DEC's first out-of-order Alpha, four-wide with roughly 100 instructions in flight, at a point when it was still an open question whether a high-performance out-of-order machine could be made to work at all.[1]

One episode from that project stuck with him. The EV5 performance model ran to 30,000 lines of code; a colleague, Alan Eustace, told him he had written one in 1,000 lines. Keller stayed up for a week rewriting the EV6 model down to about 1,000 lines, then learned Eustace had never written such a model and had simply set him a harder target.[1]

## AMD, x86-64 and HyperTransport

When EV6 taped out, Dirk Meyer left for AMD; Keller followed in 1998, joining under chief operating officer Atiq Raza.[1][11] By his own account, Compaq took over Digital about three months after he moved.[1] Meyer led the K7 project, which became the Athlon and which borrowed the EV6 bus and cache system under license from Digital. Keller then started the K8 project.[1]

K8 moved AMD to a micro-op design throughout and added 64-bit addressing. Keller has said his main contribution to that architecture was as "one of the principal authors of the x86-64 spec, the HyperTransport spec, which is the glueless multiprocessor spec."[1] AMD's own 2012 press release credits him with co-authoring both the HyperTransport specification and the x86-64 instruction set, and with an instrumental role on the team responsible for the Athlon 64 and Opteron.[3] K8 reached the market as the Opteron in April 2003, four years after Keller had left.[12]

He departed AMD in 1999 for the startup wave, briefly attempting a company with Raza's backing before joining Dan Dobberpuhl at SiByte.[1]

## SiByte, Broadcom, P.A. Semi and Apple

SiByte built a MIPS-based networking system on chip with gigabit [Ethernet](https://aiwiki.ai/wiki/ethernet) controllers, memory controllers and accelerator blocks. Keller has recalled that Andy Bechtolsheim and others at Cisco effectively specified the part on a napkin. [Broadcom](https://aiwiki.ai/wiki/broadcom) acquired the company, and Keller stayed on as chief architect of the resulting line of network processors for a total of roughly four to five years across both firms.[1][3]

P.A. Semi was in his description "literally the reboot of SiByte," this time on a PowerPC architectural license. Dobberpuhl, Amarjit Gill and Leo Joseph were the senior founders, with Keller among a second group that included Puneet Kumar, Mark Hader and Sribalan Santhanam.[1] The part was an out-of-order PowerPC design able to stream data from 10 gigabit ports into on-chip memory, and it could be taped out either as a network processor or as a standalone general-purpose chip.[1]

The company taped out a working part and was then bought: news of Apple's acquisition of P.A. Semi broke on 23 April 2008, at a reported price of about $278 million.[1][13] Keller joined Apple and, by Intel's later account, led custom low-power mobile chip efforts including the original A4 used in the iPhone 4 and the subsequent A5, the beginning of what became [Apple silicon](https://aiwiki.ai/wiki/apple_silicon).[4] AMD described his Apple role as director in platform architecture, working on chip families found in Apple's iPads, iPhones, iPods and Apple TVs.[3]

## Return to AMD and the Zen recovery

AMD announced on 1 August 2012 that Keller, then 53, had joined as corporate vice president and chief architect of the company's microprocessor cores, reporting to chief technology officer Mark Papermaster.[3] Keller has recounted being shown a chart of AMD's server share, which had climbed from zero to about 35 percent with Opteron and then fallen back to roughly 4 percent, and concluding that the Bulldozer architecture was simply not competitive. His diagnosis was blunt: the methodology, the team organization and the architecture were all wrong, and AMD's instructions per clock were about half of Intel's.[1]

He asked chief executive Rory Read for permission to cancel the existing Bulldozer and Jaguar core roadmaps, which he has called the decision that set Zen free, and set a bounding box for the new core of about 10 square millimeters, 5 watts and 3.5 GHz.[1] He also led K12, a 64-bit ARM core conceived as an architectural companion to Zen on the expectation that ARM servers would become a large market. AMD shelved it after he left, a decision Keller has said publicly the company was stupid to make.[1][14]

Keller left AMD again in September 2015.[15] The first Zen-based Ryzen desktop processors launched on 2 March 2017, about eighteen months later; AMD's own release described them as the product of four years of development.[16]

## Tesla and the Autopilot chip

Keller joined Tesla in January 2016 as vice president of Autopilot hardware engineering.[33] Recruited through former Apple colleagues, he told [Elon Musk](https://aiwiki.ai/wiki/elon_musk) at a meeting at SpaceX that he could build a chip to drive a car in eighteen months.[1] The actual schedule was fourteen months to tape-out, four months in the fab and two months of software bring-up, with [Samsung](https://aiwiki.ai/wiki/samsung) manufacturing the part.[1]

Pete Bannon, still at Apple, called him before he started and interviewed with Musk days after he arrived; Bannon architected the AI engine. Its central idea was to execute the operator list emitted by a then-common deep learning framework more or less as written, and to build a memory subsystem that rearranged data to match, which kept the compiler small enough that Bannon wrote it himself while competitors were hiring hundreds of people to build AI compilers.[1] Keller has described his own role as architecting the plan rather than the AI engine.[1]

The result shipped as Tesla's Hardware 3 [self-driving computer](https://aiwiki.ai/wiki/autonomous_vehicle) and remained in production for close to five years.[1] By the time he left, Keller also had responsibility for low-voltage electronics and, intermittently, the Autopilot software team.[1] Tesla confirmed his departure on 26 April 2018, with Bannon taking over his responsibilities.[17] Keller has said the Hardware 3 to Hardware 4 gap of four to five years was longer than the annual cadence he wanted, and that he was looking for a new problem.[1]

## Intel

Intel announced on 26 April 2018 that Keller would join as a senior vice president leading silicon engineering, including system-on-chip development and integration, reporting to Murthy Renduchintala. He started on 30 April 2018. Intel's release put his age at 59 and credited him with more than twenty years of x86 and ARM microarchitecture design.[4]

Keller has described the job as the largest in scope he had held: his team at AMD had been about 2,500 people and at Tesla 400 to 500, while Intel's was around 10,000, spanning client, server and networking parts.[1] Much of his attention went to design methodology. He has said a great deal of Intel technology was excellent but stuck on old CAD tools and design flows, that Intel's internal CAD organization ran to 1,200 people, many of them building wrappers around commercial tools, and that his group introduced what they called a bare metal flow to expose lower-level interfaces.[1]

He resigned effective 11 June 2020, with Intel citing personal reasons and Keller agreeing to serve as a consultant for six months.[9] In the 2024 oral history he gave a fuller account: he was not burned out, but he believed the engineering organization needed a far bigger reset than chief executive Bob Swan did, and concluded that a senior engineering leader cannot operate out of alignment with the chief executive.[1]

## Tenstorrent

Keller had been an angel investor in Tenstorrent before he joined it.[1] The company, founded in 2016[30] and then headquartered in Toronto with offices in Austin and Silicon Valley, announced on 6 January 2021 that he was joining as president, chief technology officer and board member.[10] In January 2023 he and founder Ljubisa Bajic swapped roles: Keller became chief executive, Bajic became president and chief technology officer, and Keith Witek joined as chief operating officer.[2]

### The Tensix architecture

Tenstorrent's [AI accelerators](https://aiwiki.ai/wiki/ai_accelerator) are grids of Tensix cores connected by an on-chip network. Each Tensix core contains five small RV32IM RISC-V processors, two handling data movement over the network-on-chip and three driving the compute pipeline stages that Tenstorrent calls unpack, math and pack, alongside a local [SRAM](https://aiwiki.ai/wiki/sram) block, a matrix and vector engine, and network routers.[18][19] Cores exchange data through circular buffers in SRAM rather than round-tripping through DRAM.[19] The small RISC-V cores are directly programmable rather than hidden inside a fixed-function accelerator, which is the architectural argument for the approach: Keller has framed the machine as a tensor processor fed by RISC-V processors that interpret one layer of the software stack.[1][18]

The software stack is open source, spanning TT-Metalium at the low level plus TT-NN, TT-Forge and TT-LLK.[20] Keller has said the open stack turned out to be an unexpectedly effective recruiting tool, because candidates read the code before they apply.[1]

### Products

| Generation | Status | Notes |
|---|---|---|
| Grayskull | on sale by July 2024[1] | e75 board: 96 Tensix cores, 12 nm, 1 GHz, 8 GB LPDDR4 at 102.4 GB/s, about 55 TFLOPS at FP16[19] |
| [Wormhole](https://aiwiki.ai/wiki/wormhole_tenstorrent) | successor to Grayskull, on sale[1][34] | n150: 60 Tensix cores, 16 GB GDDR6 at 256 GB/s, up to 160 W; n300: 120 cores, 32 GB GDDR6 at 512 GB/s with QSFP-DD ports for chip-to-chip scale-out; about 131 TFLOPS BF16 peak[19][34] |
| [Blackhole](https://aiwiki.ai/wiki/blackhole_tenstorrent) | launched 3 April 2025[20] | 6 nm, 120 Tensix cores, 16 larger RISC-V cores, up to 32 GB GDDR6 at 512 GB/s, 180 MB SRAM, 664 TFLOPS at Block FP8, 300 W board power[20][21] |
| [Galaxy Blackhole](https://aiwiki.ai/wiki/tenstorrent_galaxy_blackhole) | announced 29 April 2026[22] | Server built from 32 Blackhole chips: 23 PFLOPS Block FP8, 6.2 GB on-chip SRAM at 2.9 PB/s, 1 TB of DRAM at 16 TB/s[22] |

Blackhole developer boards launched at prices of $999 for the p100 and $1,399 for the p150, with a four-processor liquid-cooled desktop, TT-QuietBox, at $11,999.[20] The Galaxy Blackhole system starts at $110,000, and a four-system base supercluster at $440,000.[22]

### Funding

| Date | Round | Amount | Terms and lead investors |
|---|---|---|---|
| May 2021 | growth round | over $200 million | $1 billion valuation, led by Fidelity Management and Research Company[23] |
| August 2023 | strategic up-round | $100 million | Co-led by [Hyundai](https://aiwiki.ai/wiki/hyundai) Motor Group and the Samsung Catalyst Fund[24] |
| December 2024 | Series D | over $693 million | $2 billion pre-money, led by Samsung Securities and AFW Partners, with Bezos Expeditions, LG Technology Ventures, Hyundai Motor Group, Fidelity, Baillie Gifford, XTX Markets, Export Development Canada and others[6] |

On the Series D, Keller said he had been struck during fundraising by how interested investors were in the company's open-source approach to software.[6]

### Licensing and partnerships

Tenstorrent sells design IP as well as silicon. Keller has pointed out that Nvidia will not license its IP to companies building products it would regard as competing with it, which leaves an opening for customers who want to own their own silicon.[1] The TT-Ascalon RISC-V CPU was productized in 2025 in several variants: Ascalon-X, the largest, pitched against Arm's Neoverse V2 and V3 server cores; Ascalon-S, compared to Arm's Cortex-A78; and Alexandria, which adds automotive functional safety features and opens up industrial and medical markets. Tensix Neo is the corresponding next-generation AI core, moving to a cluster architecture that shares memory and network-on-chip across four cores. LG and Hyundai are named licensees, and as of late 2025 most of the company's bookings came from IP deals rather than chip sales.[25]

Japan's Leading-edge Semiconductor Technology Center selected Tenstorrent's RISC-V and chiplet IP in February 2024 for an edge 2 nm AI accelerator, with Rapidus Corporation handling logic development, wafer processing and advanced 3D packaging.[26] [LG Electronics](https://aiwiki.ai/wiki/lg_electronics) and Tenstorrent expanded an initial chiplet project into joint work on systems on chip in November 2024.[27]

### 2026

By mid-2026 Tenstorrent was reporting production deployments rather than trials. In April 2026 it announced that Galaxy Blackhole was deployed at scale and published inference figures including more than 350 tokens per second per user on [DeepSeek-R1](https://aiwiki.ai/wiki/deepseek_r1) 0528 at 671 billion parameters, plus sub-four-second time to first token on 100,000 token contexts.[22] A June 2026 announcement claimed 900 tokens per second per user on [Kimi K2.6](https://aiwiki.ai/wiki/kimi_k2_6), launched the TT-Ascalon S CPU IP for agentic workloads, and set out a Japanese expansion: more than 120 Galaxy systems deployed by the sovereign AI operator ai&, described by Tenstorrent as the largest scale of sovereign AI compute in the region; a RISC-V CPU chiplet contributed to the national 2 nm program run with Rapidus under LSTC; a Tokyo office open since 2023 and an AI data center in Osaka; and up to 200 Japanese silicon engineers being brought into its design teams.[26][28]

In an interview published the same month, Keller said the company was past the proof-of-concept stage with ten customers running Galaxy systems on site, had taken an order for a 96-Galaxy cluster of 3,072 chips, was building 1,000 Galaxy servers with at least half already sold, and that its investors were "very hot on IPO."[29]

That interest ran in both directions. In June 2026 The Information reported that [Qualcomm](https://aiwiki.ai/wiki/qualcomm) was in discussions to acquire Tenstorrent, in a deal that trade coverage said could value the company at between $8 billion and $10 billion. Tenstorrent declined to comment and Qualcomm said it does not comment on rumors; no agreement has been announced.[30]

## Views on AI hardware

Keller's public argument is that the AI hardware market is not as closed as it looks. His February 2024 posts on X held that [CUDA](https://aiwiki.ai/wiki/cuda) had accumulated complexity the way x86 did rather than building a durable advantage, that "Basically nobody writes Cuda. If you do write Cuda, it's probably not fast," and that "There's a good reason there's Triton, Tensor RT, Neon, Mojo."[7][8]

The corresponding product strategy is deliberately contrarian. In a June 2025 interview he described the approach as making a list of what [Nvidia](https://aiwiki.ai/wiki/nvidia) does and doing the opposite, said Tenstorrent was doing "literally nothing" about NVLink because standard Ethernet is adequate for its scale-out model, and argued that smaller and cheaper chips, simpler servers and open-source software are each individually a good idea.[5] He also predicted that "RISC-V will win in the long-run over ISAs that allow zero or limited customization," and dismissed the framing of AI accelerators as commodity [matrix multiplication](https://aiwiki.ai/wiki/matrix_multiplication) engines with software bolted on as, in his words, the stupidest thing he had ever heard.[5]

By 2026 his emphasis had shifted toward memory and communication as the binding constraints, with on-chip SRAM sized to hold the working set and enough buffering to move data between memory, tensor processors and chips. He has argued that "There are no new laws" governing AI computation, that the fundamentals are rooted in high-performance computing from the 1970s, and that "Agentic computing is an Amdahl's Law problem": because inference finally got fast enough to be bottlenecked by the scalar part of the work, agentic systems have started driving CPU demand.[29]

## Other ventures

Keller co-founded a semiconductor tooling startup with Sam Zeloof, originally named Atomic Semi. It raised roughly $15 million in seed funding in 2023 led by the OpenAI Startup Fund at about a $100 million valuation, with angel investors including Naval Ravikant, Nat Friedman and Fred Ehrsam.[31] The company rebranded as Fab2 and moved its center of gravity to Texas in 2026, operating a 120,000 square foot facility in Austin, a 30,000 square foot plant in Lockhart intended to mass-produce compact fabs, and its original 25,000 square foot San Francisco site.[31][32] Its stated approach is to design all the hardware and software needed to make chips and to build the fabs, tools and components itself.[32]

## See also

- [Tenstorrent](https://aiwiki.ai/wiki/tenstorrent)
- [RISC-V](https://aiwiki.ai/wiki/risc_v)
- [AI accelerator](https://aiwiki.ai/wiki/ai_accelerator)
- [Blackhole (Tenstorrent)](https://aiwiki.ai/wiki/blackhole_tenstorrent)
- [CUDA](https://aiwiki.ai/wiki/cuda)
- [AI accelerator comparison](https://aiwiki.ai/wiki/ai_accelerator_comparison)

## References

1. Computer History Museum, "Oral History of Jim Keller," interviewed by Douglas Fairbairn, recorded 8 July 2024, CHM Reference number 2024.0071. https://archive.computerhistory.org/resources/access/text/2024/10/102809019-05-01-acc.pdf
2. BetaKit, "Tenstorrent swaps CEOs as Apple, AMD, Intel alum takes helm of AI chip unicorn," 24 January 2023. https://betakit.com/tenstorrent-swaps-ceos-as-apple-amd-intel-alum-takes-helm-of-ai-chip-unicorn/
3. AMD, "Computer Architect Jim Keller Joins AMD as Chief of Processor Group," press release, 1 August 2012. https://ir.amd.com/news-events/press-releases/detail/240/computer-architect-jim-keller-joins-amd-as-chief-of-processor-group
4. Intel, "Jim Keller Joins Intel to Lead Silicon Engineering," press release, 26 April 2018. https://www.intc.com/news-events/press-releases/detail/162/jim-keller-joins-intel-to-lead-silicon-engineering
5. EE Times, "Jim Keller: 'Whatever Nvidia Does, We'll Do The Opposite'," 5 June 2025. https://www.eetimes.com/jim-keller-whatever-nvidia-does-well-do-the-opposite/
6. Tenstorrent, "Tenstorrent Closes $693M of Series D Funding Led by Samsung Securities and AFW Partners," 2 December 2024. https://tenstorrent.com/en/newsroom/tenstorrent-closes-693m-of-series-d-funding-led-by-samsung-securities-and-afw-partners
7. Tom's Hardware, "Jim Keller criticizes Nvidia's CUDA, x86," 19 February 2024. https://www.tomshardware.com/tech-industry/artificial-intelligence/jim-keller-criticizes-nvidias-cuda-and-x86-cudas-a-swamp-not-a-moat-x86-was-a-swamp-too
8. Gigazine, "Jim Keller criticizes NVIDIA's CUDA as 'a swamp, not a moat'," 20 February 2024. https://gigazine.net/gsc_news/en/20240220-jim-keller-nvidia-cuda-swamp/
9. Intel Newsroom, "Changes in Intel's Technology, Systems Architecture and Client Group," 11 June 2020. https://www.intel.com/content/www/us/en/newsroom/news/changes-technology-systems-architecture-client.html
10. Design & Reuse, "Jim Keller joins Tenstorrent as President and CTO," Toronto, 6 January 2021. https://www.design-reuse.com/news/9481-jim-keller-joins-tenstorrent-as-president-and-cto-/
11. Electronic Specifier, "Who is Jim Keller and what's he doing at Tenstorrent?," 18 January 2024. https://www.electronicspecifier.com/news/appointments/who-is-jim-keller-and-what-s-he-doing-at-tenstorrent/
12. Wikipedia, "Opteron." https://en.wikipedia.org/wiki/Opteron
13. The New York Times DealBook, "Apple Said to Buy Chipmaker for $278 Million," 23 April 2008. https://archive.nytimes.com/dealbook.nytimes.com/2008/04/23/apple-said-to-buy-chipmaker-for-278-million/
14. Notebookcheck, "Zen architecture pioneer Jim Keller feels AMD was stupid to cancel the K12 Core ARM processor," 22 June 2022. https://www.notebookcheck.net/Zen-architecture-pioneer-Jim-Keller-feels-AMD-was-stupid-to-cancel-the-K12-Core-ARM-processor.629843.0.html
15. Parm Mann, Hexus, "Legendary CPU architect Jim Keller leaves AMD," 18 September 2015. https://hexus.net/tech/news/cpu/86585-legendary-cpu-architect-jim-keller-leaves-amd/
16. AMD, "AMD Ryzen 7 Desktop Processors Featuring Record-Breaking Performance Now Available Worldwide," 2 March 2017. https://www.amd.com/en/newsroom/press-releases/2017-3-2-amd-ryzen-tm-7-desktop-processors-featuring-recor.html
17. CNBC, "Tesla's head of Autopilot leaves, ex-Apple exec to succeed," 26 April 2018. https://www.cnbc.com/2018/04/26/teslas-head-of-autopilot-leaves-ex-apple-exec-to-succeed.html
18. Tenstorrent documentation, "RISC-V Guide," TT VSCode Toolkit. https://docs.tenstorrent.com/tt-vscode-toolkit/riscv-guide/
19. Hiari Pizzini Cavagna, Daniele Cesarini and Andrea Bartolini, "Assessing Tenstorrent's RISC-V MatMul Acceleration Capabilities," arXiv:2505.06085, May 2025. https://arxiv.org/abs/2505.06085
20. Tenstorrent, "Tenstorrent Launches Blackhole Developer Products at Tenstorrent Dev Day," 3 April 2025. https://tenstorrent.com/en/newsroom/tenstorrent-launches-blackhole-developer-products-at-tenstorrent-dev-day
21. Tenstorrent, "Blackhole" product page. https://tenstorrent.com/en/hardware/blackhole
22. Tenstorrent, "Tenstorrent Enables AI at Scale with Industry-Leading Performance," 29 April 2026. https://tenstorrent.com/en/newsroom/tenstorrent-enables-ai-at-scale-with-industry-leading-performance
23. PR Newswire, "Tenstorrent Raises Over $200 Million at $1 Billion Valuation to Create Programmable High Performance AI Computers," 20 May 2021. https://www.prnewswire.com/news-releases/tenstorrent-raises-over-200-million-at-1-billion-valuation-to-create-programmable-high-performance-ai-computers-301295913.html
24. PR Newswire, "Tenstorrent Raises a $100M Strategic Up-Round Co-Led by Hyundai Motor Group and the Samsung Catalyst Fund," 2 August 2023. https://www.prnewswire.com/news-releases/tenstorrent-raises-a-100m-strategic-up-round-co-led-by-hyundai-motor-group-and-the-samsung-catalyst-fund-301891181.html
25. EE Times, "Tenstorrent Productizes RISC-V CPU and AI IP," 25 September 2025. https://www.eetimes.com/tenstorrent-productizes-risc-v-cpu-and-ai-ip/
26. Tenstorrent, "Tenstorrent RISC-V and Chiplet Technology Selected to Build the Future of AI in Japan," 27 February 2024. https://tenstorrent.com/en/newsroom/tenstorrent-risc-v-and-chiplet-technology-selected-to-build-the-future-of-ai-in-japan
27. LG Newsroom, "LG and Tenstorrent Expand Partnership to Enhance AI Chip Capabilities," 12 November 2024. https://www.lg.com/global/newsroom/news/corporate/lg-and-tenstorrent-expand-partnership-to-enhance-ai-chip-capabilities/
28. Tenstorrent, "Tenstorrent Sets New Performance Records, Launches TT-Ascalon S, and Expands Across Japan," 30 June 2026. https://tenstorrent.com/en/newsroom/tenstorrent-sets-new-performance-records-launches-tt--ascalon-s
29. EE Times, "Jim Keller on Tenstorrent's BlackHole Scaling and IPO Ambitions," 25 June 2026. https://www.eetimes.com/jim-keller-on-tenstorrents-blackhole-scaling-and-ipo-ambitions/
30. Data Center Dynamics, "Qualcomm considers acquiring AI chip firm Tenstorrent," 18 June 2026. https://www.datacenterdynamics.com/en/news/qualcomm-considers-acquiring-ai-chip-firm-tenstorrent/
31. Tom's Hardware, "Atomic Semi rebrands as Fab2 and shifts operations to Texas," 5 July 2026. https://www.tomshardware.com/tech-industry/atomic-semi-rebrands-as-fab2-and-shifts-operations-to-texas
32. Fab2, "About." https://fab2.com/about/
33. Seth Weintraub, Electrek, "The chip guru who built Apple's Ax microprocessors joins Tesla to lead the Autopilot Hardware Engineering team," 28 January 2016. https://electrek.co/2016/01/28/tesla-jim-keller-apple-processor-architect-2/
34. Tenstorrent, "Wormhole" product page. https://tenstorrent.com/en/hardware/wormhole