Normal Computing

Normal Computing is an American deep-tech startup developing thermodynamic computing hardware and AI-driven electronic design automation (EDA) software. Founded in 2022 in New York City by veterans of Google Brain, Google X, Palantir, and Los Alamos National Laboratory, the company is one of the most prominent commercial efforts to build a new class of "physics-based" application-specific integrated circuits (ASICs) that exploit thermal noise, stochastic dynamics, and dissipation as computational resources rather than treating them as engineering nuisances.^[1][2][3] Normal positions itself at the intersection of two converging crises: the runaway energy footprint of frontier AI training and the rising design cost and complexity of advanced semiconductors. The firm pursues both problems with a single thesis: pair an AI-native EDA platform with a novel "Carnot architecture" of stochastic processors, and use each side of the business to fund and accelerate the other.^[4][5]

In August 2025, Normal Computing announced the successful tape-out of CN101, which it describes as the world's first dedicated thermodynamic computing chip, targeting linear-algebra and stochastic-sampling primitives at up to a thousandfold energy advantage over comparable GPU workloads.^[6][7][8] Unlike the company's 2023 analog prototype, CN101 is a digital chip: the August 2026 paper describing it says the chip "implements the formulation through discrete accumulator dynamics on standard CMOS using stochastic computing principles", and reports linear-system solves, a conditional variational autoencoder generating MNIST digits on one chip, and a flow-matching model generating CIFAR-10 images across six chips.^[32] In March 2026 the company closed a $50 million strategic round led by the Samsung Catalyst Fund, bringing total disclosed funding to more than $85 million.^[4][9] Normal sits alongside Extropic, Lightmatter, Mythic, Etched, Rain AI, and other "post-Moore" hardware startups attempting to design computing substrates whose physics is matched, rather than abstracted away from, the workloads they accelerate.^[10][11]

Founding and history

Normal Computing was incorporated in 2022 in New York City. Its three co-founders are CEO Faris Sbahi, Chief Technology Officer Antonio J. Martinez, and Chief Product Officer Yui-Hong "Matthias" Tan.^[2][12] All three had worked together at Alphabet on production probabilistic-machine-learning systems before leaving to start the company. Sbahi was the valedictorian of his class at Duke University and joined Google as a software engineer working on YouTube Ads auctions, algorithmic game theory, and production ML and data-science tooling, before becoming a research scientist at X, the Moonshot Factory, where he worked on decision-making under uncertainty and Bayesian machine learning.^[12] Martinez and Tan held parallel roles at Google Brain and X, building infrastructure for uncertainty-aware AI at Alphabet scale.^[2][4]

The founders' stated motivation was that the production AI stacks they had helped build at Google were dominated, in real-world deployments, by problems of calibration, uncertainty, and out-of-distribution generalization. They argued that those failure modes had a common root: software written for deterministic von Neumann processors had been forced to simulate the stochastic, sample-based mathematics that probabilistic AI actually requires. Their answer was to design hardware whose native operations are sampling and inference, not deterministic floating-point arithmetic.^[1][13]

Within months of incorporation, Normal recruited Patrick J. Coles as Chief Scientist. Coles had previously been the principal investigator of Los Alamos National Laboratory's near-term quantum computing group, where he organized the LANL Quantum Computing Summer School and was a major contributor to the literature on quantum machine learning and variational quantum algorithms.^[14] His arrival anchored a research-heavy strategy that produced a steady stream of arXiv papers throughout 2023 and 2024, several of which laid the theoretical groundwork for the company's later hardware.^[13][15][16]

Normal announced an $8.5 million seed round in June 2023 (the release says it closed in January), led by Celesta Capital and First Spark Ventures with participation from Micron Ventures and other investors.^[17][18] In October 2024 the company was selected as one of twelve teams for the United Kingdom Advanced Research and Invention Agency (ARIA) £50 million "Scaling Compute" programme, which targets a 1,000x reduction in the unit cost of AI compute.^[3] By early 2025 Normal disclosed a further $35 million round backed by Eric Schmidt's First Spark Ventures, Celesta Capital, Drive Capital, ARIA, Micron Ventures, Samsung Next, Intel Ignite, and the National Security Innovation Network, with the company expanding into San Francisco, London, and Copenhagen.^[5] The CN101 tape-out followed in mid-2025: an August 7, 2025 company post referred to "our Normal ASICs first tape-out in June", Coles later wrote that the chip was taped out "in July 2025", the March 2026 funding release says the tape-out was completed in August 2025,^[9] and the public announcement came on August 12, 2025.^[6][33][37] The same August 2025 post announced Erik Meijer, formerly founder of Meta's Probability group and creator of LINQ at Microsoft, as VP of Engineering, and said the company then had "more than 45 engineers, researchers, and operators".^[37] The Samsung Catalyst-led $50 million strategic round closed in March 2026.^[4][9]

Scientific basis

Thermodynamic computing

Thermodynamic computing treats a physical substrate as a sampler from a programmable probability distribution rather than as a deterministic function evaluator. The basic idea is older than Normal Computing and traces to a series of mid-twentieth-century results on the thermodynamics of information, including Maxwell's demon, Landauer's principle, and the Crooks fluctuation theorem.^[11] Modern thermodynamic computing inherits a key insight from that lineage: in a closed physical system relaxing to equilibrium, the distribution over states is uniquely determined by a controllable potential energy function. If a designer can shape that potential to match a target probability distribution, the device produces a sample from the distribution simply by waiting for it to equilibrate. Energy that a conventional digital chip spends suppressing thermal noise is, in this regime, spent by the thermodynamic device generating useful work.^[15][16]

Normal's chief scientist Patrick Coles, together with several co-authors at Normal and academic collaborators, formalized this picture in the February 2023 arXiv paper "Thermodynamic AI and the fluctuation frontier" (arXiv:2302.06584).^[19] The paper argues that an apparently disparate set of probabilistic AI algorithms, including generative diffusion models, Bayesian neural networks, Monte Carlo sampling, and simulated annealing, can be unified under a single mathematical framework in which the algorithm is the equilibration of a stochastic differential equation. That observation immediately suggests that a single physical substrate, properly programmed, could implement any of those algorithms natively.^[19]

Stochastic processing units (SPUs) and the Carnot architecture

Normal's first concrete device, described in its December 2023 paper "Thermodynamic Computing System for AI Applications" (arXiv:2312.04836, later published as Melanson et al., Nature Communications 16:3757, April 2025), is a printed-circuit-board prototype called a stochastic processing unit (SPU).^[13][20] The SPU consists of eight RLC unit cells with all-to-all switched-capacitor coupling. Voltages across the capacitors evolve under Langevin dynamics; at equilibrium the joint voltage distribution is a multivariate Gaussian whose covariance is the inverse of a precision matrix programmed into the coupling network. Reading out the voltages therefore produces samples from a user-specified Gaussian, and time-averaging the samples computes the inverse of the precision matrix.^[13][20]

The published prototype operated with a 12 MHz measurement frequency and demonstrated 8x8 matrix inversion across three nominally identical SPU copies, with experimental error attributed to component tolerances. The authors projected that an integrated-circuit version of the architecture, with the inductors replaced by purely resistive coupling, would cross GPU performance at roughly d ~ 3,000 dimensions and reach an order-of-magnitude speedup at d = 10,000, with even larger savings in energy. Crucially, the asymptotic scaling for sampling is O(d²) versus O(d³) for digital Cholesky decomposition, so the advantage grows with problem size.^[13][20]

CN101, Normal's first silicon implementation, does not carry the prototype's analog circuit onto a chip. Silicon lead Zach Belateche's April 2025 roadmap post said the design "takes the key advantages of that first prototype", parallel updates of full-precision state variables, "and develops it into a reconfigurable design that can scale up in silicon", adding that "the states of s-units are no longer analog voltages on capacitors, but instead 32-bit numbers in digital registers".^[31] Normal calls the design its Carnot architecture.^[6][7][31] The August 2026 paper on the fabricated chip (arXiv:2608.00754) describes it as "a prototype digital thermodynamic computing chip, named CN101, that implements the formulation through discrete accumulator dynamics on standard CMOS using stochastic computing principles": values travel as pseudo-random bitstreams whose time average is the encoded number, multiplication of two streams is a single AND gate, and the equilibrating process is "a discrete-state Markov chain realised entirely in digital logic" rather than the continuous Langevin dynamics of the SPU.^[32] Coles wrote in August 2026 that where the earlier prototype "was built from analog circuits on a printed circuit board, CN101 was the first implementation of thermodynamic computing in digital CMOS, manufacturable with standard processes and running its tiles asynchronously on independent local clocks".^[33] IEEE Spectrum had reported in May 2025 that the team acknowledged the PCB prototype "is not scalable" and was "getting rid of tricky-to-scale inductors" for a design "in silico, rather than on a printed circuit board".^[38]

The tape-out announcement named two computational primitives for the architecture: dense linear-algebra and matrix operations, and a proprietary Lattice Random Walk (LRW) sampler for stochastic sampling.^[6][7][8] LRW is a discretization scheme for stochastic differential equations, described in an August 2025 preprint by Samuel Duffield, Maxwell Aifer, Denis Melanson, Belateche, and Coles, that "samples binary or ternary increments at each step, suppressing complex drift and diffusion computations to simple 1 or 2 bit random values" so that the dynamics can run on "stochastic computing architectures that avoid floating-point arithmetic"; Coles said in August 2026 that the paper had been accepted by npj Unconventional Computing.^[33][34] On CN101 the paper uses LRW-discretized Ornstein-Uhlenbeck dynamics for its linear-system tests, while the generative models run as layer-by-layer stochastic matrix multiplies with weights "supplied by ordinary training".^[32]

Comparison with classical, neuromorphic, and quantum computing

Thermodynamic computing is closest in spirit to neuromorphic computing in that both reject the strict separation between memory and compute that defines the von Neumann architecture. The key contrast is that classical neuromorphic chips, including Intel's Loihi and IBM's TrueNorth, still rely on deterministic spike events whose stochasticity is engineered to be small. A thermodynamic SPU explicitly programs the stochastic differential equation that governs the analog state and reads samples from its stationary distribution.^[11][16]

Thermodynamic computing also differs from quantum computing in a way that matters for near-term commercialization. Both quantum and thermodynamic devices are designed to sample from a target distribution that would be exponentially expensive to draw from with a digital pseudo-random-number generator. Quantum computers, however, require cryogenic isolation from thermal noise; thermodynamic computers are meant to use thermal noise as the source of their randomness and therefore operate at room temperature in conventional CMOS-compatible processes. Normal's hardware to date has not yet drawn on ambient noise: Quanta Magazine noted that the SPU "didn't actually run on ambient noise, which was too low-level to affect the dynamics", so the researchers injected noise from a random-number generator, and CN101 generates its Bernoulli bits with a 65-bit linear-feedback shift register per neuron, with the paper stating that the chip's "modular pseudo-random-number interface accepts a physical noise source in a future chip".^[32][39] The trade-off is that thermodynamic computing has no analogue of quantum entanglement and so cannot, in principle, accelerate the same complexity class that a fault-tolerant quantum computer would. The Normal team has consistently framed the SPU not as a quantum competitor but as a probabilistic accelerator for the slice of AI workloads that are dominated by Gaussian sampling, matrix inversion, Langevin dynamics, and diffusion processes.^[15][16][19]

Team backgrounds

Normal's research output reflects an unusual concentration of physicists, quantum-computing veterans, and probabilistic-ML specialists in a single hardware company.

• Faris Sbahi, co-founder and CEO, ex-X (Google) research scientist; Duke University.^[12]
• Antonio J. Martinez, co-founder and CTO, formerly at Google Brain and X.^[2][4]
• Yui-Hong "Matthias" Tan, co-founder and CPO, formerly at X, the Moonshot Factory, in strategy and partnerships.^[2]
• Patrick J. Coles, Chief Scientist, formerly principal investigator at Los Alamos National Laboratory's near-term quantum computing group; Churchill Scholar at the University of Cambridge and chemical-engineering PhD from UC Berkeley.^[14]
• Gavin E. Crooks, senior research scientist, namesake of the Crooks fluctuation theorem and a foundational figure in nonequilibrium statistical mechanics.^[3][15]
• Maxwell Aifer, Samuel Duffield, Kaelan Donatella, Phoebe Klett, Denis Melanson, Max Hunter Gordon, Thomas Ahle, Mohammad Abu Khater, research scientists who appear as authors on the company's core thermodynamic-computing papers.^{[13][15][16][20]}
• Zachary Belateche and Vincent Cheung, hardware engineers previously at the chip startup Radical Semiconductor, brought in to lead the silicon implementation of the SPU concept.^[3] Belateche was Silicon Engineering Lead at the CN101 announcement and is listed as an advisor on the company site as of September 2026; Cheung is an author of the CN101 paper.^[6][32][42]
• Lars Holdijk (also affiliated with the University of Oxford), first author of the August 2026 CN101 paper, with Brandon Birchall, listed first on the Hot Chips 2026 program entry, and Nicholas Lehrter also on the author list.^[32][35]
• Craig Churchill, Chief Business Officer, and Johann George, VP of Engineering, leading commercialization and platform engineering respectively.^[2]

In August 2025 the company said it had "more than 45 engineers, researchers, and operators" in New York, San Francisco, London, and Copenhagen.^[37] The March 2026 funding release described the company as headquartered in New York with offices in San Francisco, London, and Copenhagen "and future expansion in Korea", and by September 2026 the company's site listed a fifth office in Pangyo, South Korea.^[9][42]

Hardware

CN101 and the Carnot architecture

CN101 is a physics-based ASIC implementing the Carnot architecture. Normal has publicly disclosed that the chip targets linear algebra and matrix operations alongside stochastic sampling via Lattice Random Walk, and that the company expects the architecture to deliver up to a 1,000x energy advantage on suitable AI and scientific workloads.^[6][7][8] The tape-out announcement on August 12, 2025 marked the transition from prototype-on-PCB to characterization-and-benchmarking of a manufactured die. Neither the announcement nor the August 2026 paper discloses the foundry, process node, or die area; the paper's parameter table lists four tiles, a 64x64 stochastic matrix multiplier per tile, 16,384 multiply-accumulate cells, 256 neuron accumulators of 32 bits, a 65-bit LFSR pseudo-random generator per neuron, and an operating frequency of roughly 500 MHz.^[6][7][32] The paper calls CN101 "a prototype built to prove out the substrate-independent formulation in silicon rather than as a finished or commercial design", with "many of its blocks ... deliberately first-generation".^[32]

The technical departure of CN101 from the published SPU prototype is that the coupled analog resonators of the eight-cell PCB have been replaced by digital logic. Each of the four tiles pairs a stochastic matrix multiplier (SMM), in which AND gates multiply bitstreams and OR gates accumulate them, with a reconfigurable neuron bank (RNB) that adds the bias and applies the nonlinearity (ReLU directly, or a finite-state machine for other functions) and an output accumulator (OA) that can be read at any moment without disturbing the dynamics. Weights are held as deterministic 8-bit values so that only the input stream adds variance. A stochastic streaming network-on-chip (SSNoC) routes bitstreams between tiles, and because every bit of a stream carries the same expected value, the tiles can run on independent clocks, "each tile driven either by a global clock tree or by a local ring oscillator", which the paper calls polysynchronous clocking. The evaluation board carries CN101 with an FPGA, power regulation, and a USB-C host interface.^[32] Programming the chip means loading a trained network layer by layer, one weight matrix per tile; when a model spans several chips, the host reads each chip's running estimate from its output accumulator, applies any bias, normalization, or integration step, and refreshes the downstream inputs window by window, with on-board exchange between chips "left to a subsequent chip in the Carnot Architecture".^[32] The 2023 SPU papers remain the reference for the Langevin formulation that the digital chip generalizes.^[13][20]

CN101 results (2026)

The CN101 paper was posted to arXiv on August 1, 2026 with seventeen authors, and the work was listed on the Hot Chips 2026 program (August 23-25, 2026) as "CN101 - Thermodynamic Computing for Generative AI in Digital CMOS".^[32][35] Its central claim is that the "equilibration-style" formulation of thermodynamic computing, previously "formulated exclusively through Langevin dynamics, restricting its implementations to analogue substrates", is substrate-independent, and that three properties follow from it: "the precision of a result is a knob set by how long the dynamics are run, sample averages decompose across independent trajectories, and dependent stages of a computation operate concurrently rather than serially, a property we call sequential parallelism".^[32] The company-reported experimental results are:

Coles summarized the Hot Chips numbers as "small-scale results" that "validate the primitives".^[33] The paper reports no energy or latency measurements: it states that "the energy and latency targets that motivate the programme are deferred to later chips", and Quanta Magazine wrote in July 2026 that the device "has yet to be assessed by other experts".^[32][39]

Roadmap

Normal has published a public roadmap that anchors on three Carnot-architecture chips:

The roadmap is consistent with Normal's broader thesis that thermodynamic substrates are best suited to workloads dominated by Langevin-like dynamics, which is precisely the inner loop of diffusion models.^[7][8] Belateche's April 2025 post described the intended 2026 improvements as "a more compact interaction matrix, a network-on-chip capable of supporting many more tiles, and support for additional vector math operations", plus on-chip control and caching so that a chip can sample from several distributions in sequence without off-chip transfers.^[31] By August 2026 the company's stated emphasis had shifted: Coles wrote that "our current focus is LLM inference", that the target architecture is "stochastic analog computation in memory", and that the company's "current reference systems run models up to 128B parameters", with rack-scale attention in memory for models "up to a trillion parameters" as the goal.^[33] The company's site in September 2026 described "Normal ASICs" as "PCIe accelerator cards in standard air-cooled servers" with a reference system available and pilot deployments open, and listed "$85M+" in funding.^[36] As of September 6, 2026 the company's blog index carried no CN201 tape-out announcement.^[41]

Normal EDA

In parallel with the Carnot hardware, Normal has built a commercial AI-native electronic-design-automation product, marketed as Normal EDA. The platform applies large-model reasoning to register-transfer-level (RTL) design, verification, and ASIC implementation tasks; in the March 2026 release Sbahi said "Normal EDA exists to accelerate custom silicon to market by 2x today, and, over time, to enable 1000x gains in efficiency with our platform".^[9] The release also describes the platform as applying auto-formalization, combining LLMs with formal logic, and names Normal as a founding member of the Silicon Integration Initiative (Si2) LLM Benchmarking Coalition; in April 2026 the company published DRAMBench, a benchmark developed with Fraunhofer IESE for turning natural-language DRAM specifications into timed Petri net models.^[9][41] According to CEO Faris Sbahi, by the time of the March 2026 funding announcement, Normal EDA was being used by more than half of the top ten semiconductor companies by revenue.^[4][5][9] Internally, the company uses Normal EDA to design its own Carnot chips, treating the EDA product as both a revenue line and a development accelerator for the rest of the business.^[4]

Software and applications

The company's published software stack abstracts the SPU as a primitive in the same way a GPU exposes matrix multiplication. The two primitives that CN101 exposes (linear algebra and LRW sampling) compose into a number of higher-level AI workloads:

• Bayesian inference. Normal's October 2024 paper "Thermodynamic Bayesian Inference" (arXiv:2410.01793) shows that Bayesian posteriors can be sampled in time scaling as O(N ln(d/epsilon²)) on a thermodynamic device, where N is the number of samples and d the parameter dimension. This is asymptotically faster than digital matrix-inversion approaches, including for non-Gaussian posteriors such as Bayesian logistic regression.^[16] Bayesian neural networks, Gaussian processes, and linear regression are direct beneficiaries of this primitive (see also bayesian neural network).
• Diffusion model sampling. The inner loop of a diffusion model is mathematically an overdamped Langevin sampler. A thermodynamic device whose potential encodes the learned score function can equilibrate to the correct output by physics alone. Claims of roughly 10,000x energy reductions over GPUs for diffusion-like inference come from other groups, not from Normal: Extropic's October 2025 paper reports that figure from a system-level analysis of its own all-transistor probabilistic architecture, and a single-author April 2026 preprint by Aditi De (no Normal Computing author) argues that skip connections and input conditioning can be mapped onto an analog substrate with a small digital interface.^[21][22] Normal's own CN101 paper runs diffusion-style flow-matching models on the chip but reports no energy measurements.^[32]
• Monte Carlo and second-order optimization. Normal's February 2025 paper "Scalable Thermodynamic Second-order Optimization" (arXiv:2502.08603) describes how natural-gradient and Newton-method-style optimizers, which rely on matrix-inverse-vector products, can be accelerated on the same hardware that performs Gaussian sampling, since the two operations share the same underlying physics.^[23]
• Scientific simulation. Linear-system solves, matrix exponentials, and Lyapunov equations are common in computational chemistry, computational fluid dynamics, and control theory. A 2025 paper, "Thermodynamic matrix exponentials and thermodynamic parallelism" by Duffield, Aifer, and collaborators, published in Physical Review Research, extends the SPU programming model to these primitives.^[24]

Normal's published hardware materials through September 2026 describe data-center deployment, "PCIe accelerator cards in standard air-cooled servers, scaling from card to server to rack", rather than an edge AI product; the tape-out coverage in Data Center Dynamics likewise describes AI and HPC workloads and mentions no edge product.^[7][36]

Funding history

Disclosed rounds, in chronological order:

Cumulative disclosed funding, as of March 2026, exceeds $85 million.^[4] The company has not publicly disclosed valuation in any of its rounds.

Publications

Normal Computing has an unusually visible research footprint for a hardware startup, with most key contributions posted to arXiv and several published in peer-reviewed venues. A representative selection includes:

• Coles, P. J. et al. "Thermodynamic AI and the fluctuation frontier." arXiv:2302.06584, February 2023.^[19]
• Aifer, M., Donatella, K., Hunter Gordon, M., Duffield, S., Ahle, T., Simpson, D., Crooks, G. E., Coles, P. J. "Thermodynamic Linear Algebra." arXiv:2308.05660, August 2023; the CN101 paper cites it as published in npj Unconventional Computing 1(1), 13 (2024).^[15][32]
• Duffield, S., Aifer, M., Crooks, G., Ahle, T., Coles, P. J. "Thermodynamic Matrix Exponentials and Thermodynamic Parallelism." arXiv:2311.12759, November 2023.^[40]
• Melanson, D., Abu Khater, M., Aifer, M., Donatella, K., Hunter Gordon, M., Ahle, T., Crooks, G., Martinez, A. J., Sbahi, F., Coles, P. J. "Thermodynamic Computing System for AI Applications." arXiv:2312.04836, December 2023; published as Nature Communications 16:3757, April 2025.^[13][20]
• Aifer, M., Duffield, S., Donatella, K., Melanson, D., Klett, P., Belateche, Z., Crooks, G., Martinez, A. J., Coles, P. J. "Thermodynamic Bayesian Inference." arXiv:2410.01793, October 2024.^[16]
• Donatella, K. et al. "Scalable Thermodynamic Second-order Optimization." arXiv:2502.08603, February 2025.^[23]
• Duffield, S., Aifer, M., et al. "Thermodynamic matrix exponentials and thermodynamic parallelism." Physical Review Research, 2025 (journal version of the November 2023 preprint above).^[24]
• Aifer, M., Belateche, Z., Bramhavar, S., Camsari, K. Y., Coles, P. J., Crooks, G., Durian, D. J., Liu, A. J., Marchenkova, A., Martinez, A. J., McMahon, P. L., Sbahi, F., Weiner, B., Wright, L. G. "Solving the compute crisis with physics-based ASICs." arXiv:2507.10463, July 2025. A landscape paper that Coles describes as written "with our collaborators at ARIA, UC Santa Barbara, Penn, Cornell, Yale, and the Santa Fe Institute".^[25][33]
• Duffield, S., Aifer, M., Melanson, D., Belateche, Z., Coles, P. J. "Lattice Random Walk Discretisations of Stochastic Differential Equations." arXiv:2508.20883, August 2025 (v2 February 2026); accepted by npj Unconventional Computing according to Coles.^[33][34]
• Donatella, K., Duffield, S., Aifer, M., Melanson, D., Crooks, G., Coles, P. J. "Thermodynamic natural gradient descent." npj Unconventional Computing 3(1), 5 (2026), as cited in the CN101 paper.^[32]
• Holdijk, L., Melanson, D., Mensch, Z., Birchall, B., Cheung, V., Lehrter, N., Aifer, M., Duffield, S., Ernst, J. O., Salegame, R., Martinez, A. J., Crooks, G., Cheng, M., Belateche, Z., Bright, M., Coles, P. J., Sbahi, F. "CN101 - A Digital Thermodynamic Computer for Generative AI." arXiv:2608.00754, August 1, 2026.^[32]

Two papers that earlier versions of this article listed as Normal publications are by other groups: "Generative thermodynamic computing" (arXiv:2506.15121, June 2025) is a single-author paper by Stephen Whitelam of Lawrence Berkeley National Laboratory, and "An efficient probabilistic hardware architecture for diffusion-like models" (arXiv:2510.23972, October 2025) is by Extropic authors including Guillaume Verdon and Trevor McCourt.^[22][26]

Partnerships

Normal's most consequential partnerships, as publicly disclosed, fall into three groups.

The first is public-research funding. The October 2024 selection by UK ARIA for the Scaling Compute programme is the largest non-dilutive line of support; it co-funds Normal Computing UK's London office and gives the company access to a cohort of academic partners working on adjacent novel-architecture chips.^[3]

The second is silicon and supply-chain partners. The strategic round led by the Samsung Catalyst Fund in March 2026 explicitly linked Normal to Samsung's broader memory and foundry ecosystem, and the company's earlier rounds included Micron Ventures and Intel Ignite, both of which sit close to the production fabs Normal will need as it moves from CN101 to volume CN201 and CN301 silicon.^[4][9]

The third is the Normal EDA customer base, which by March 2026 included more than half of the top ten semiconductor companies by revenue. The names of those customers have not been publicly disclosed, but Sbahi has confirmed both the count and the strategic importance of the relationships, since the same large foundries and integrated device manufacturers are the natural future buyers of Carnot-architecture IP.^[4][9]

Position in the post-Moore AI hardware landscape

By 2025 the AI hardware market was crowded with novel-architecture startups arguing, in different ways, that the energy and economic curves of scaling nvidia GPU-based training had broken. Normal Computing fits into that landscape as the most prominent commercial vendor of thermodynamic computing, with one direct philosophical competitor and a wider set of indirect rivals.

The closest competitor is Extropic, a startup headquartered in Waltham, Massachusetts, with offices in San Francisco,^[29] founded the same year (2022) by ex-Google Quantum AI engineers Guillaume Verdon and Trevor McCourt. Extropic also pursues thermodynamic computing but emphasizes a "thermodynamic sampling unit" (TSU) architecture in which the chip natively produces samples from a programmable energy-based model, with claims of up to 10,000x energy savings for inference relative to GPUs.^[10][11] Extropic announced $14.1 million in seed funding led by Kindred Ventures in December 2023^[30] and published a litepaper in March 2024. The two companies differ in emphasis: Normal Computing presents its SPU as a general-purpose probabilistic accelerator for linear algebra, Bayesian inference, and diffusion sampling, anchored on continuous-variable dynamics (and, since CN101, on discrete accumulator dynamics in digital logic that keep the same equilibration formulation); Extropic's TSU emphasizes a more directly generative interpretation in which the chip's stationary distribution is itself the trained model. Both companies share the underlying claim that programmable thermal noise can outperform programmable transistor switching for a useful and growing class of AI workloads.^[11] The CN101 paper draws the line between the two approaches explicitly: the p-bit direction is "defined by a different computational formulation where the focus is on sampling from a programmable probability distribution rather than evaluating arbitrary functions using a thermodynamic process", and "we do not address the sampling focused direction here".^[32] Coles has criticized p-bit approaches for "requiring users to train new models suited to the hardware", saying Normal builds "for the models people already run".^[33] Fortune's March 2026 report on the Samsung round grouped Normal with Extropic and with Unconventional AI, the startup led by former Intel AI chief Naveen Rao, which Fortune said raised a $475 million seed round in January 2026.^[4]

The broader competitive table, drawn from public 2025-2026 disclosures, places Normal Computing among other novel-architecture chip startups.

Within that landscape, Normal Computing's distinctive bet is the dual-product strategy. Most chip startups stake their viability on a single device generation; Normal monetizes Normal EDA against the wider semiconductor industry while iterating on Carnot silicon, and reuses each side to subsidize the other. The investor base, which by 2026 included Samsung, Micron, Intel Ignite, Galvanize, Brevan Howard, ArcTern, and Eric Schmidt's First Spark Ventures, is closer to a strategic semiconductor consortium than a typical venture syndicate, which both reflects and reinforces that strategy.^[4][9]

Reception and critiques

Industry coverage in 2024 and 2025 generally treated the SPU prototype and the CN101 tape-out as credible early milestones rather than commercial products. Reports in Inside HPC, Data Center Dynamics, Tom's Hardware, TechRadar, and TechSpot focused on the company's published research, on its claims of up to 1,000x energy efficiency, and on the open questions about how those claims will hold up under independent benchmarking once CN101 silicon is in customer hands.^{[7][8][27][28]} Normal itself has been comparatively conservative in framing CN101 as a "foundational" tape-out, with the production-grade chips (CN201 and CN301) still ahead of it.^[6][7] IEEE Spectrum's May 2025 coverage of the SPU opened by asking whether thermodynamic computing is "just probabilistic computing by a new name", quoting Ludwig Computing's CTO that "it's this same computing paradigm" but "a new implementation", and its CEO that "there is a lot to be worked to really take it from what [it] is today to [a] commercial product".^[38] Quanta Magazine's July 2026 survey of the field reported that CN101 "has yet to be assessed by other experts", and the CN101 paper itself lists a bias floor from weight-register precision and a burn-in transient that parallel replicas cannot average away as properties of this first instantiation.^[32][39]

A second strand of commentary has noted that thermodynamic computing inherits a small but real legacy of skepticism from the broader probabilistic-computing community: similar claims have been made in the past for analog and stochastic accelerators that ultimately failed to scale beyond demonstration silicon. Normal's response, articulated most fully in its July 2025 landscape paper (arXiv:2507.10463) with collaborators at Cornell, Yale, Penn, and UC Santa Barbara, has been that the missing ingredient in earlier efforts was a complete software and EDA stack, and that AI-native chip design (the Normal EDA business) is precisely the missing link.^[25]

See also

• bayesian neural network
• diffusion model
• quantum processor
• edge ai
• cerebras
• sambanova
• groq
• nvidia
• nvidia h100
• stochastic gradient descent sgd

References

1. ^1 ^2Normal Computing. "About." normalcomputing.com/about. Accessed 2026-05-20.
2. ^1 ^2 ^3 ^4 ^5 ^6Normal Computing. Company "About" page (founders, leadership, team and offices). normalcomputing.com/about. Accessed 2026-05-20.
3. ^1 ^2 ^3 ^4 ^5 ^6PR Newswire. "Normal Computing Selected for ARIA's £50M Scaling Compute Programme to Revolutionize AI Hardware Costs." October 31, 2024. prnewswire.com/...nize-ai-hardware-costs-302293266. Accessed 2026-05-20.
4. ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10 ^11 ^12 ^13Fortune. "Exclusive: Normal Computing raises $50M from Samsung Catalyst to tackle soaring AI chip costs and power demands." March 25, 2026. fortune.com/...atalyst-ai-chip-costs-power-demands. Accessed 2026-05-20.
5. ^1 ^2 ^3 ^4 ^5Normal Computing blog. "Normal Computing Corp: $35M to build AI for our most pressing crises in silicon." normalcomputing.com/...normal-computing-corp. Accessed 2026-05-20.
6. ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10 ^11PR Newswire. "Normal Computing Announces Tape-Out of World's First Thermodynamic Computing Chip." August 12, 2025. prnewswire.com/...dynamic-computing-chip-302527154. Accessed 2026-05-20.
7. ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9Data Center Dynamics. "Normal Computing tapes-out world's first thermodynamic chip for energy efficient AI workloads." datacenterdynamics.com/...y-efficient-ai-workloads. Accessed 2026-05-20.
8. ^1 ^2 ^3 ^4 ^5Normal Computing blog. "Normal Computing Announces Tape-Out of World's First Thermodynamic Computing Chip." normalcomputing.com/...hermodynamic-computing-chip. Accessed 2026-05-20.
9. ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10 ^11PR Newswire. "Normal Computing Raises $50M Led by Samsung Catalyst to Accelerate Silicon Design and Solve AI Hardware Energy Crisis." March 25, 2026. prnewswire.com/...hardware-energy-crisis-302724819. Accessed 2026-05-20.
10. ^1 ^2 ^3Extropic. Company website. extropic.ai. Accessed 2026-05-20.
11. ^1 ^2 ^3 ^4 ^5 ^6Communications of the ACM. "Thermodynamic Computing Becomes Cool." cacm.acm.org/...thermodynamic-computing-becomes-cool. Accessed 2026-05-20.
12. ^1 ^2 ^3Crunchbase. "Faris Sbahi - Co-Founder and CEO @ Normal Computing." crunchbase.com/...faris-sbahi. Accessed 2026-05-20.
13. ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8Melanson, D. et al. "Thermodynamic Computing System for AI Applications." arXiv:2312.04836, December 2023. arxiv.org/...2312.04836. Accessed 2026-05-20.
14. ^1 ^2Patrick Coles. LinkedIn profile (Researcher in Artificial Intelligence, Thermodynamic AI, and Physics-based Computing). linkedin.com/...patrick-coles-3038b5132. Accessed 2026-05-20.
15. ^1 ^2 ^3 ^4 ^5 ^6Aifer, M., Donatella, K., Hunter Gordon, M., Duffield, S., Ahle, T., Simpson, D., Crooks, G. E., Coles, P. J. "Thermodynamic Linear Algebra." arXiv:2308.05660, August 2023. arxiv.org/...2308.05660. Accessed 2026-05-20.
16. ^1 ^2 ^3 ^4 ^5 ^6 ^7Aifer, M. et al. "Thermodynamic Bayesian Inference." arXiv:2410.01793, October 2024. arxiv.org/...2410.01793. Accessed 2026-05-20.
17. ^1 ^2Normal Computing blog. "Normal Computing Raises $8.5M in Seed Funding to Enable AI Solutions For Critical Enterprise and Government Applications." June 13, 2023. normalcomputing.com/...and-government-applications. Accessed 2026-05-20.
18. ^1 ^2PR Newswire. "Normal Computing Raises $8.5M in Seed Funding to Enable AI Solutions For Critical Enterprise and Government Applications." June 13, 2023. prnewswire.com/...overnment-applications-301849058. Accessed 2026-05-20.
19. ^1 ^2 ^3 ^4Coles, P. J. et al. "Thermodynamic AI and the fluctuation frontier." arXiv:2302.06584, February 2023. arxiv.org/...2302.06584. Accessed 2026-05-20.
20. ^1 ^2 ^3 ^4 ^5 ^6Melanson, D. et al. "Thermodynamic computing system for AI applications." Nature Communications 16, 3757 (April 22, 2025). pmc.ncbi.nlm.nih.gov/...PMC12015238. Accessed 2026-05-20.
21. ^"Thermodynamic Diffusion Inference with Minimal Digital Conditioning." arXiv:2604.14332 (preprint). arxiv.org/...2604.14332. Accessed 2026-05-20.
22. ^1 ^2"An efficient probabilistic hardware architecture for diffusion-like models." arXiv:2510.23972, October 2025. arxiv.org/...2510.23972v1. Accessed 2026-05-20.
23. ^1 ^2Donatella, K. et al. "Scalable Thermodynamic Second-order Optimization." arXiv:2502.08603, February 2025. arxiv.org/...2502.08603. Accessed 2026-05-20.
24. ^1 ^2Duffield, S., Aifer, M., et al. "Thermodynamic matrix exponentials and thermodynamic parallelism." Physical Review Research, 2025. (See related arXiv preprint and Physical Review Research index.) Accessed 2026-05-20.
25. ^1 ^2"Solving the compute crisis with physics-based ASICs." arXiv:2507.10463, July 2025. arxiv.org/...2507.10463v1. Accessed 2026-05-20.
26. ^"Generative thermodynamic computing." arXiv:2506.15121, June 2025. arxiv.org/...2506.15121. Accessed 2026-05-20.
27. ^Tom's Hardware. "World's first 'thermodynamic computing chip' reaches tape out." tomshardware.com/...changes-lanes-to-train-more-ai. Accessed 2026-05-20.
28. ^TechRadar. "Normal Computing says its CN101 thermodynamic chip can run certain AI tasks more efficiently while cutting data center electricity demands." techradar.com/...-unsustainable-energy-consumption. Accessed 2026-05-20.
29. ^PR Newswire. "Extropic Signs $75 Million Letter of Intent with U.S. Department of Commerce to Scale and Onshore Thermodynamic Computing." July 30, 2026. morningstar.com/...onshore-thermodynamic-computing. Accessed 2026-09-05.
30. ^SiliconANGLE (Maria Deutscher). "Extropic raises $14.1M to build 'physics-based computing' hardware for generative AI." December 4, 2023. siliconangle.com/...mputing-hardware-generative-ai. Accessed 2026-09-05.
31. ^1 ^2 ^3Normal Computing blog (Zach Belateche). "Scaling Thermodynamic Compute." April 7, 2025. normalcomputing.com/...scaling-thermodynamic-compute. Accessed 2026-09-06.
32. ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10 ^11 ^12 ^13 ^14 ^15 ^16 ^17 ^18 ^19 ^20 ^21Holdijk, L., Melanson, D., Mensch, Z., Birchall, B., Cheung, V., Lehrter, N., Aifer, M., Duffield, S., Ernst, J. O., Salegame, R., Martinez, A. J., Crooks, G., Cheng, M., Belateche, Z., Bright, M., Coles, P. J., Sbahi, F. "CN101 - A Digital Thermodynamic Computer for Generative AI." arXiv:2608.00754, August 1, 2026. arxiv.org/...2608.00754. Accessed 2026-09-06.
33. ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10Normal Computing blog (Patrick J. Coles). "AI Inference Needs New Hardware." August 4, 2026. normalcomputing.com/...nference-needs-new-hardware. Accessed 2026-09-06.
34. ^1 ^2Duffield, S., Aifer, M., Melanson, D., Belateche, Z., Coles, P. J. "Lattice Random Walk Discretisations of Stochastic Differential Equations." arXiv:2508.20883, August 28, 2025 (v2 February 17, 2026). arxiv.org/...2508.20883. Accessed 2026-09-06.
35. ^1 ^2Hot Chips. Hot Chips 2026 conference site and program (August 23-25, 2026), listing "CN101 - Thermodynamic Computing for Generative AI in Digital CMOS" by Normal Computing. hotchips.org. Accessed 2026-09-06.
36. ^1 ^2Normal Computing. Home page ("Normal ASICs", reference systems, "$85M+ funding raised"). normalcomputing.com. Accessed 2026-09-06.
37. ^1 ^2 ^3 ^4Normal Computing blog. "Normal Computing Expands Leadership Team." August 7, 2025. normalcomputing.com/...ing-expands-leadership-team. Accessed 2026-09-06.
38. ^1 ^2IEEE Spectrum (Dina Genkina). "Prototype Computer Uses Noise to Its Advantage." May 19, 2025 (print title "Thermodynamic Computing Is the Hot New Trend", August 2025 issue). spectrum.ieee.org/...ic-computing-normal-computing. Accessed 2026-09-06.
39. ^1 ^2 ^3Quanta Magazine (Philip Ball). "Thermodynamic Computers Go With the (Energy) Flow." July 15, 2026. quantamagazine.org/...ith-the-energy-flow-20260715. Accessed 2026-09-06.
40. ^Duffield, S., Aifer, M., Crooks, G., Ahle, T., Coles, P. J. "Thermodynamic Matrix Exponentials and Thermodynamic Parallelism." arXiv:2311.12759, November 21, 2023 (v2 January 5, 2024). arxiv.org/...2311.12759. Accessed 2026-09-06.
41. ^1 ^2Normal Computing. Blog index (post listing, including "CN101 - A Digital Thermodynamic Computer for Generative AI", August 10, 2026, and "From Specifications to Formal Models: Autoformalizing Memory Chips with DRAMBench", April 23, 2026). normalcomputing.com/blog. Accessed 2026-09-06.
42. ^1 ^2Normal Computing. "About" page (offices in New York City, San Francisco, London, Copenhagen, and Pangyo; team listing). normalcomputing.com/about. Accessed 2026-09-06.