Arm Holdings
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Arm Holdings plc is a British semiconductor IP and software design company headquartered in Cambridge, England. It does not manufacture chips. Instead, it designs CPU, GPU, and neural processor IP, then licenses that IP to roughly every relevant chip vendor on the planet, collecting royalties on each chip those vendors ship.[20] Arm cores sit inside more than 99% of modern smartphones, almost every microcontroller you can name, and a fast-rising share of cloud servers and AI accelerators. The company is majority owned by Japan's SoftBank Group and listed on Nasdaq under the ticker ARM, after a September 2023 IPO that valued it above $54 billion.[3]
The "Arm" name has been recycled three times in the company's life. It started life in 1983 inside Acorn Computers as the Acorn RISC Machine.[16] In 1990 it became Advanced RISC Machines Ltd, a joint venture between Acorn, Apple, and VLSI Technology.[16] From 1998 through 2016 it was the publicly listed ARM Holdings plc. After SoftBank took it private in 2016 the company restyled itself as Arm Ltd, then re-listed as Arm Holdings plc in 2023. The chip ARM architecture itself, just spelled "Arm," is the longest running and most widely deployed instruction set architecture in computing history, with more than 300 billion chips shipped by Arm partners as of 2024.[17]
This article focuses on how that IP empire ended up at the center of the AI build-out: the Neoverse data center roadmap, the Ethos NPU family, the SVE2 vector extensions, and the partnerships with Nvidia, Amazon's AWS, Microsoft, and Google that have made Arm cores the default substrate for hyperscale AI infrastructure.
| Field | Detail |
|---|---|
| Legal name | Arm Holdings plc |
| Founded | 27 November 1990 (as Advanced RISC Machines Ltd)[16] |
| Headquarters | Cambridge, England, United Kingdom |
| Listing | Nasdaq Global Select Market, ticker ARM |
| IPO date | 14 September 2023[3] |
| IPO price | $51.00 per ADS[3] |
| IPO proceeds | approx. $4.87 billion (base)[4], $5.23 billion including greenshoe[5] |
| Parent | SoftBank Group (about 89.9% post-IPO)[1] |
| CEO | Rene Haas (since February 2022)[17] |
| Predecessor CEOs | Robin Saxby, Warren East, Simon Segars |
| Key founders / architects | Sophie Wilson, Steve Furber, Hermann Hauser, Robin Saxby[16] |
| Business model | IP licensing plus per-chip royalties[20] |
| FY2024 revenue (year ended 31 March 2024) | $3.23 billion |
| FY2024 royalty revenue | approx. $1.80 billion |
| FY2024 license / non-royalty revenue | approx. $1.43 billion |
| Cumulative chips shipped (Arm partners) | 300+ billion (announced 2024)[17] |
The technology that became Arm started in a much smaller company called Acorn Computers, in Cambridge.[16] Acorn had built the BBC Micro and was looking for a successor processor that the available 16-bit chips of the early 1980s could not deliver. Two engineers there, Sophie Wilson and Steve Furber, were assigned the task of designing a 32-bit CPU from scratch.[16] Wilson designed the instruction set; Furber owned the chip-level architecture.
They took the RISC ideas coming out of Berkeley and Stanford and ran with them, but kept the design tiny. The first silicon, ARM1, came back from VLSI Technology and ran on 26 April 1985, using about 25,000 transistors on a 3 micron process.[16] Cambridge legend has it that the first ARM1 chip drew so little current it ran on leakage from the test rig before anyone connected the power supply.
The ARM2 followed and ended up in the Acorn Archimedes home computer in 1987, the first RISC-based home computer to ship. ARM3 added a small cache. None of these chips made Acorn a global player; Acorn was a British home-computer company in a market about to be steamrolled by the IBM PC clone industry. But the architecture itself was unusually well suited to what was coming next: low-power, battery-driven devices.
The direct trigger for Arm's spin-out was Apple. Apple was working on the Newton MessagePad and needed a CPU that could run a tablet on batteries. Apple looked at the available x86 and 68k options, did not love them, and ended up at Acorn's door.
In the autumn of 1990 the three parties hammered out a joint venture in roughly six weeks. Advanced RISC Machines Ltd was incorporated on 27 November 1990.[16] Acorn contributed engineers and the ARM technology. Apple put up about $3 million for a 43% stake.[16] VLSI Technology, which had been fabricating Acorn's chips, brought design tools and a foundry relationship. Robin Saxby, from Motorola and European Silicon Structures, took the CEO seat and ran the company for its first 15 years.
Saxby made a decision early on that defined the company forever after: ARM would not try to manufacture chips and would not sell its own chips. It would license processor designs to anyone who wanted them, including direct competitors, and live off royalties.[20] That choice looked unambitious in 1991. By 2010 it had given Arm cores a position in the mobile market that Intel could not break into.
The ARM6 powered the Newton MessagePad in 1993. The Newton flopped, but the ARM610 inside it was the first commercially shipped Arm chip from a third party.[16] The licensing list grew steadily through the 1990s: Texas Instruments, Sharp, Cirrus Logic, Samsung. By 1998 ARM Holdings plc was ready to list on the London Stock Exchange and Nasdaq simultaneously, raising about $40 million on debut and giving the company external capital and public-company discipline for the first time.[16]
Arm sells two things. The upfront sale is a license granting the customer the right to use specific Arm IP in their own silicon. License fees vary with the complexity of the IP and typically run from about $1 million to roughly $10 million for a single CPU core or subsystem.[20] The recurring sale is a royalty, paid for every chip a partner ships that contains Arm IP. Royalties usually fall in the range of 1 to 2% of the chip's selling price, although Arm has been pushing that number upward since the SoftBank acquisition.[20]
Licenses come in three tiers. A Technology License Agreement (TLA) gives the partner the right to use a specific ready-made Arm core, like a Cortex-A78 or a Neoverse N2, with no permission to alter the microarchitecture.[20] A "Built on Arm Cortex Technology" tier allows some partner-specific tuning of an Arm core. The top tier is an Architectural License Agreement (ALA), which gives the partner the right to design its own clean-sheet CPU implementing an Arm instruction set.[20] ALAs are how Apple builds its A-series and M-series cores (see also Apple silicon), how Qualcomm builds its Oryon cores via Nuvia, and how Ampere Computing builds its later AmpereOne generations. ALAs are expensive, scarce, and slow to obtain.
In 2023 Arm started shifting toward a per-device royalty model on some product lines, charging royalties as a percentage of the device price rather than the chip price. That pushed Qualcomm into a public legal fight, covered in the Qualcomm Nuvia dispute section below.
The Arm ISA has gone through several major generations, each of which sets a new floor for the IP cores Arm can sell.
| ISA | Announced | Highlights |
|---|---|---|
| ARMv4 / v5 | 1990s | Original 32-bit RISC, Thumb compressed encoding |
| ARMv6 | 2002 | SIMD, multimedia extensions, used in early smartphones |
| ARMv7-A | 2005 | Cortex-A8 / A9, ran most early Android phones, NEON SIMD |
| ARMv8-A | 2011 | First 64-bit Arm ISA (AArch64), Cortex-A53/A57 onward, became the smartphone default |
| ARMv8.2-A onward | 2016+ | Half-precision floating point, dot product, BFloat16 for ML |
| ARMv9-A | March 2021 | SVE2 vectors, Confidential Compute Architecture, Realm Management Extension |
| ARMv9.2 / 9.3 / 9.4 | 2022-2024+ | Scalable Matrix Extension (SME, SME2), more memory tagging, more security |
The v8-A transition in 2011 was the more important one historically: it is what brought 64-bit to mobile devices and let Arm cores plausibly compete in servers. The v9-A announcement in March 2021 is the more important one for AI workloads. ARMv9-A made SVE2 a baseline feature, added the Confidential Compute Architecture (CCA), and set the stage for Scalable Matrix Extension (SME), which adds outer-product matrix instructions of the kind that show up in transformer attention and convolution kernels. Apple's M4 was one of the first shipping chips to support SME, in 2024.
The Cortex-A brand is the best known of three Cortex profiles, which together cover Arm's ready-made CPU cores. The split is by target market.
| Family | Profile | Where it ships |
|---|---|---|
| Cortex-A | Application | Smartphones, tablets, smart TVs, infotainment, set-top boxes |
| Cortex-R | Real-time | Storage controllers, automotive brake and powertrain ECUs, 5G baseband |
| Cortex-M | Microcontroller | Sensors, wearables, hearing aids, motor control, IoT endpoints |
The Cortex-A family runs the rich-OS world. Almost every Android phone in the past decade has used some mix of Cortex-A cores, often paired in DynamIQ clusters of high-performance and high-efficiency cores. The big-little design idea (a small efficient core handles background work, a larger core handles peak load) started with Arm's HMP and now shows up across the industry.
In 2020 Arm introduced the Cortex-X line, a premium tier sold separately from the main Cortex-A line. The X cores are larger, hotter, and aimed at single-thread peak performance. The Cortex-X1 launched in 2020, followed by the X2, X3 and X4. In May 2024 Arm renamed the next generation Cortex-X925 (skipping the expected "X5" label to align numbering across its 2024 portfolio) and announced it as a 5th-generation flagship core built on the 3 nm process node[15], claiming a 15% IPC uplift on Geekbench 6.2 and a 36% peak single-core gain over the X4.[14] The X925 became the de facto big core in 2024-2025 Android flagship SoCs from MediaTek and Samsung.
The Cortex-M side is less glamorous and more lucrative in volume. M0, M0+, M3, M4, M7, M23, M33, M35P, M55 and M85 cover everything from 50-cent microcontrollers to TrustZone-enabled secure elements. The Cortex-M55, introduced in 2020, was the first Cortex-M with Arm Helium (M-profile Vector Extension), targeted at on-device ML inference paired with an Ethos-U55 NPU.
Cortex-R is smaller in volume but quietly important. Cortex-R5 and R52 sit inside automotive safety controllers, NAND flash controllers, hard drive controllers, and 5G modems. Anyone who runs an SSD has Cortex-R cores doing the wear leveling.
Arm sells GPU IP under the Mali GPU brand. Mali was originally an acquisition of the Norwegian company Falanx Microsystems in 2006. Mali GPUs sit inside the majority of Android SoCs that do not use a Qualcomm Adreno GPU, including most MediaTek Dimensity and Samsung Exynos parts.
The Mali-G77, G78, and G710 ran the late 2010s and early 2020s. In 2022 Arm split the brand. The premium tier became Immortalis; Mali remained the mid-range and entry-level brand. Immortalis-G715, announced in mid-2022, was the first Arm GPU with hardware-accelerated ray tracing. The ray tracing unit takes about 4% of the shader core area but lifts ray tracing throughput several times over a software path. Immortalis-G720 followed in 2023 with deferred vertex shading and better ML throughput. Immortalis-G925 (5th-generation architecture) followed in 2024 with about a third more ML inference throughput than G720.[15]
The Mali / Immortalis side is consequential for AI even outside the obvious mobile ML use cases. Stable Diffusion variants and small language models running on a Pixel or Galaxy device almost always go through Mali, Immortalis, or one of the third-party GPUs sitting next to Arm CPU cores.
The Ethos brand is Arm's neural processor IP. The lineup splits into two families.
| NPU | Generation | Target |
|---|---|---|
| Ethos-N77 | First-gen N | Mobile / IoT NPU, up to 4 TOPS per core, scalable to 32 TOPS |
| Ethos-N78 | First-gen N (refresh) | Mobile mid-range NPU |
| Ethos-N57 / N37 | First-gen N | Smaller variants |
| Ethos-U55 | Microcontroller | Tiny NPU paired with Cortex-M55, embedded ML |
| Ethos-U65 | Microcontroller | Higher-perf U-series, can pair with Cortex-A |
| Ethos-U85 | Microcontroller (3rd gen) | Transformer-aware NPU, 128 to 2048 MAC units, around 4x the throughput of U65 |
The Ethos-U series is the more interesting half right now. These are tiny accelerators meant to drop into a microcontroller-class SoC next to a Cortex-M, sip about 100 milliwatts, and run a quantized convolutional or transformer model in real time. The Ethos-U85, introduced in 2024, was Arm's first Ethos product to add native hardware support for transformer operators (transpose, gather, matmul, resize bilinear, argmax). PyTorch's ExecuTorch backend targets Ethos-U directly, which is a non-trivial commitment from Meta's side. The U-series is one of the main vehicles for Arm in edge AI, where the host SoC's power budget is measured in milliwatts.
The Ethos-N line is more troubled. Ethos-N is supposed to be the standalone NPU you drop into a phone or smart camera SoC. In practice many Arm partners build their own NPU IP instead, because NPU design is moving fast and licensing a generic Arm NPU has felt like betting on someone else's IP roadmap. Apple, Qualcomm, MediaTek, and Samsung all run their own NPUs. So the Ethos-N footprint is real but narrower than the Ethos-U footprint.
This is the part of the company that has changed Arm's position in AI infrastructure the most.
For a long time Arm was a mobile and embedded story. Servers were Intel Xeon and AMD Epyc. Calxeda, Cavium, AppliedMicro, Qualcomm Centriq, and Macom all tried to crack the data center in the early 2010s with mixed results. The architecture was technically capable, but the software stack and per-socket performance were not yet good enough to displace x86 in volume.
The Neoverse brand, introduced in 2018, was Arm's third serious attempt at servers. The strategy was to build a dedicated server-class CPU IP line, separate from Cortex-A, with the wide cores, large caches, mesh interconnects, and many-core scaling that hyperscale workloads actually need.
| Neoverse generation | Announced | Notable customers and uses |
|---|---|---|
| Cosmos (Cortex-A72/A75 derived) | 2018 | First-gen AWS Graviton |
| Neoverse N1 | 2019 | AWS Graviton2, Ampere Altra, Oracle Cloud |
| Neoverse V1 | 2020 | AWS Graviton3, scientific computing, SVE support |
| Neoverse N2 | 2021 | Microsoft Cobalt 100, Alibaba Yitian 710 |
| Neoverse V2 | 2022 | NVIDIA Grace, AWS Graviton4, Google Axion |
| Neoverse E2 / E1 | 2019-2021 | Networking, edge, throughput-focused |
| Neoverse CSS N2 / V2 | 2023 | Compute Subsystems, drop-in design blocks |
| Neoverse N3 / V3 + CSS | February 2024 | Up to 32 (N3) or 64 (V3) cores, DDR5, PCIe 5.0, CXL 3.0[18] |
| Neoverse V4 ("Adonis") / N4 ("Dionysus") | Roadmap | Future generation |
The N-series is the throughput-per-watt line. The V-series is the high-performance line, with the wide pipelines and long vectors that scientific and AI workloads care about. The E-series is the network and edge line. CSS is the more recent twist: instead of selling raw IP, Arm assembles a complete compute subsystem, including the cores, the mesh interconnect, the cache hierarchy, and the system IP, and sells that as a near-drop-in design. CSS shrinks the silicon design effort for partners that want to ship their own custom server CPU but don't want to spend two or three years building a mesh. Microsoft Cobalt 100 was effectively the first volume CSS deployment.
The Neoverse customer list now includes essentially every hyperscaler:
| Hyperscaler / vendor | Arm-based product | Generation |
|---|---|---|
| AWS | Graviton, Graviton2, Graviton3, Graviton4, Graviton5 | Cortex-A72, N1, V1, V2, V3 |
| Microsoft Azure | Cobalt 100 | Neoverse N2 (CSS) |
| Google Cloud | Axion | Neoverse V2 |
| Alibaba Cloud | Yitian 710 | Neoverse N2 |
| Oracle Cloud | Ampere A1 / A2 | Ampere Altra / AmpereOne |
| NVIDIA | Grace CPU, Grace Hopper, GB200 | Neoverse V2 |
| Ampere Computing | Altra, AmpereOne | Neoverse N1, custom |
| Marvell | Octeon | Custom Arm |
| Tenstorrent / SiFive (some) | Mixed | RISC-V or Arm |
By 2025 Arm itself estimated that close to half of compute capacity shipped to top hyperscalers ran on Arm cores, with the AWS, Google, and Microsoft custom silicon programs together accounting for the bulk of new build. That is the most consequential shift in Arm's recent history. The mobile market is mature. The server market is not, and AI is the reason.
A few practical reasons. First, performance per watt. Hyperscale data center growth is now power-limited in many regions, and a Graviton4 or Cobalt 100 does roughly the same work as an Intel Xeon at meaningfully lower power. Second, scale economics: AWS, Google, and Microsoft can amortize a custom CPU design over millions of sockets, so the markup Intel and AMD charge becomes a target. Third, AI accelerators changed the economics. In an AI server, the GPU does most of the floating-point work; the CPU feeds the GPU, handles the network stack, runs the orchestration software, and gets out of the way. An Arm CPU does that at lower TCO than x86, with comparable single-thread performance.
The most prominent AI-focused Arm CPU is Nvidia's Grace, announced in 2021 and shipped in 2023. Grace pairs 72 Neoverse V2 cores with high-bandwidth LPDDR5X memory and ties directly to Hopper or Blackwell GPUs over NVLink-C2C at 900 GB/s. The Grace Hopper GH200 and Grace Blackwell GB200 superchips are the first major AI-class systems to designate the host CPU as a full peer of the GPU rather than a bystander. From Nvidia's standpoint, the choice of Arm rather than x86 was straightforward: Arm could license what Nvidia needed, and Intel and AMD could not.
The Scalable Vector Extension (SVE) was added in ARMv8.2-A as a vector extension aimed at HPC and ML. It was first deployed at scale in Fujitsu's A64FX, the CPU inside the Fugaku supercomputer that briefly held the top spot on the Top500 in 2020. SVE's distinctive feature is that the vector length is not fixed in the ISA: the same binary runs on hardware with 128, 256, 512, 1024, or 2048-bit vectors, with implementations free to choose. That portability matters for AI kernels because library writers can target one ISA and let silicon designers race on width.
SVE2, baseline in ARMv9-A, broadened the SVE instruction set so it could replace NEON in general code, not just in HPC and ML loops. SVE2 includes specialized helpers for quantized matmul, dot product, and complex multiplies for radio signal processing.
Scalable Matrix Extension (SME), added in later ARMv9 versions, is the matrix-equivalent: outer-product matrix multiply instructions with a matrix tile register, sized at runtime. Apple shipped the first volume SME implementation in the M4 in 2024. SME2 extends it. GEMM and attention dominate transformer inference time, so anything that makes outer-product matmul cheaper on the CPU pulls work back from the GPU.
On 18 July 2016, SoftBank Group announced an agreed cash offer for ARM Holdings plc at £17.00 per share, valuing the company at £24.3 billion (about $32 billion at the time).[8] It closed on 5 September 2016, and ARM was delisted from the London Stock Exchange the next day.[8]
Masayoshi Son called it the most strategic acquisition SoftBank had ever made.[8] He had been watching the smartphone wave he had bet on with the Vodafone Japan turnaround and the Yahoo BB rollout, and he saw the next wave as the Internet of Things and AI, both of which depended on Arm cores at the edge. The price was a 43% premium to the prior trading day's close.[8]
SoftBank then transferred a 25% economic interest in Arm to the SoftBank Vision Fund in 2017 (the Vision Fund's anchor backers included Saudi Arabia's Public Investment Fund). That move made Arm an asset of the Vision Fund as well as of SoftBank Group, which complicated the later Nvidia deal because it required Vision Fund partners to consent.
On 13 September 2020, Nvidia and SoftBank announced an agreement for Nvidia to acquire Arm for about $40 billion in cash and stock. At the time it would have been the largest acquisition in semiconductor history.
The deal blew up almost immediately on regulator desks. The argument from antitrust authorities was straightforward: Arm IP underpinned almost every chip company that competed with Nvidia (Qualcomm, MediaTek, Apple, AWS, Tesla, Broadcom, Marvell). If Nvidia owned Arm it could in principle prefer its own roadmap or make the IP terms uneconomic. Arm had been the neutral Switzerland of chip IP, and putting it inside the largest discrete GPU vendor would not stay neutral.
The US FTC sued to block the merger on 2 December 2021.[6] The UK Competition and Markets Authority opened a Phase 2 investigation; the European Commission was preparing one. By early 2022 the prospect of getting through all of those reviews intact was nil. On 7 February 2022, Nvidia and SoftBank announced the deal was abandoned.[7] SoftBank pivoted to Plan B: a Nasdaq IPO of Arm. Simon Segars, CEO since 2013, stepped down. Rene Haas, an Nvidia veteran who had run Arm's IP Products Group, took over as CEO that same week.[17]
The IPO priced on 13 September 2023 at $51 per American Depositary Share, the top of the marketed range.[3] ADSs began trading on the Nasdaq Global Select Market on 14 September 2023 under the ticker ARM.[9] SoftBank sold approximately 95.5 million ADS, about 9.4% of the company, and retained roughly 89.9%.[1] Including the underwriters' overallotment, the deal raised about $4.87 billion at the base offering[4] and $5.23 billion after the underwriters exercised their full greenshoe in September 2023[5], the largest US technology IPO of 2023 either way.
The stock closed up 25% on the first day at $63.59, valuing Arm above $65 billion.[9] It moved sharply higher through 2024 as investors absorbed the AI infrastructure story. By early 2025 Arm's market capitalization had crossed $150 billion at points, and SoftBank's position was at one point worth more than its total losses on WeWork.
License revenue is lumpy and depends on big multi-year ALA renewals. Royalty revenue is the smoother line, growing fastest from data center and ARMv9 royalties (which Arm charges at a higher rate than v8). Arm reports on a UK-style fiscal year ending 31 March, and files SEC disclosure as a foreign private issuer.[2]
| Fiscal year (year ended) | Total revenue | Royalty revenue | License / non-royalty | Notes |
|---|---|---|---|---|
| FY2023 (31 March 2023) | $2.68 billion | $1.68 billion | $1.00 billion | Final year private under SoftBank |
| FY2024 (31 March 2024) | $3.23 billion | approx. $1.80 billion | approx. $1.43 billion | First full FY post-IPO; +20.7% YoY |
| FY2025 (31 March 2025) | $4.01 billion | $2.17 billion | $1.84 billion | First $1B+ quarter, ARMv9 mix expanding[2] |
By the second quarter of fiscal year 2026 (calendar Q3 2025), Arm reported revenue of $1.14 billion, up 34% year over year, the third consecutive quarter above a billion.[21] ARMv9 share of royalties has continued to climb because every new flagship Android SoC and most new Neoverse customers ship v9-A by default.
After the September 2023 IPO and the greenshoe exercise, SoftBank Group retained around 89.9% of Arm's ordinary shares (held through SoftBank Group Capital and other SoftBank entities), with the public free float at roughly 10%.[1] SoftBank has reiterated that it intends to remain Arm's controlling shareholder for the foreseeable future. The structure means Arm reports to SoftBank as a controlled subsidiary; SoftBank consolidates Arm's earnings inside its own segment reporting and has used Arm's appreciation since the IPO to offset losses elsewhere in the group, including Vision Fund write-downs.
The Arm China saga is one of the strangest corporate governance stories in the chip industry. In 2018 Arm spun out its China business into a joint venture, Arm Technology China, with about 51% owned by Chinese investors and 49% by Arm.[1] The structure was meant to protect Arm's licensing relationships in China amid US-China trade tensions.
In June 2020 the Arm China board voted 7 to 1 to remove CEO Allen Wu following an internal investigation that concluded he had failed to disclose conflicts of interest, including the venture capital fund Alphatecture that he had set up in 2019 to invest in Chinese tech startups, sometimes in companies that were also Arm China customers.[10] Wu cast the lone dissenting vote, then refused to leave. Because he physically held the company seals ("chops") that Chinese law requires for legal filings, and was registered as the legal representative of the entity, the board's vote could not be enforced administratively. Lawsuits dragged on for almost two years.
In April 2022 Arm China announced new co-CEOs, Liu Renchen and Eric Chen, after the board successfully replaced Wu in the corporate registry.[11] In May 2022 Wu was still publicly contesting the move. The dispute eventually wound down through 2022 and 2023. The episode mattered for Arm's IPO because the Nasdaq prospectus had to disclose the JV control situation, and because Arm's China revenue exposure remains substantial: as of the 2023 prospectus, Arm China accounted for roughly 20 to 25% of total revenue.[1]
The other live legal saga is between Arm and Qualcomm over the Nuvia ALA. Qualcomm bought Nuvia, a server-chip startup founded by ex-Apple chip architects, for $1.4 billion in early 2021, intending to use Nuvia's Arm-based CPU designs (the Phoenix core, later renamed Oryon) inside Snapdragon SoCs for PCs and phones.[13] Arm argued that Nuvia's ALA terms (designed for high-margin server royalties) did not transfer to Qualcomm at acquisition and that Qualcomm therefore had to renegotiate; Qualcomm argued that its own pre-existing ALA covered the Nuvia-derived cores and that Nuvia's ALA could be terminated without affecting them. Arm sued Qualcomm in 2022 and demanded that the Nuvia-developed cores be destroyed.[13]
The case went to trial in the US District Court for the District of Delaware in December 2024. On 20 December 2024, the jury returned a verdict that Qualcomm had not breached its license, that the Snapdragon X Elite and other Oryon-based products were properly licensed under Qualcomm's own ALA, and that the question of whether Nuvia itself had breached its ALA before the acquisition was undecided (a hung jury on that single count).[13] The judge declared a mistrial on the Nuvia-only count. In September 2025 the same court entered final judgment in Qualcomm's favor on all remaining claims and rejected Arm's renewed motion for retrial.[12] Arm has indicated it intends to appeal. The substantive outcome is that Qualcomm can keep selling Oryon-based products under its existing license terms, and that Arm's broader push to unilaterally rewrite ALA economics has been blunted in court.[12]
| Partner | Product line(s) | Type of license |
|---|---|---|
| Apple | A-series (iPhone), M-series (Mac, iPad), see Apple silicon | Architectural license |
| Qualcomm | Snapdragon SoCs, Oryon CPU (Nuvia) | Architectural and Cortex licenses |
| Samsung | Exynos | Cortex / Architectural |
| MediaTek | Dimensity | Cortex / Architectural |
| NVIDIA | Tegra, Grace, Orin, Thor, GB200 | Architectural license |
| AWS / Annapurna Labs | Graviton 1-5 | Neoverse cores |
| Microsoft | Cobalt 100, Cobalt 200 | Neoverse CSS |
| Axion | Neoverse V2 | |
| Ampere Computing | Altra, AmpereOne | Neoverse / custom |
| Alibaba T-Head | Yitian 710 | Neoverse N2 |
| Marvell | OCTEON, ThunderX | Custom Arm |
| Broadcom, NXP, Renesas | various | Cortex |
| Tesla | FSD computer (older), HW4 | Cortex-A |
| Fujitsu | A64FX (Fugaku supercomputer) | Architectural license, custom SVE |
| ST Microelectronics | STM32 | Cortex-M |
The table understates the reach. Almost any chip described as "low power" or "embedded" since 2010 has either an Arm core in it or a RISC-V core that exists because Arm's licensing fees were too high for the use case.
On 21 January 2025, OpenAI, SoftBank, Oracle, and MGX announced the Stargate Project, a US AI infrastructure venture targeting up to $500 billion of capital expenditure on US data centers by 2029.[19] Arm was named as one of the initial technology partners, alongside Microsoft, Nvidia, Oracle, and OpenAI itself.[19] Cynics noted that this was not a coincidence given that SoftBank controls both Stargate's lead funder and Arm itself. The inclusion still matches the technical reality: modern AI data center buildouts are full of Arm cores, including Grace CPUs alongside Hopper and Blackwell GPUs, Graviton or custom Arm CPUs handling orchestration, and Cortex-R cores in NICs and storage controllers.
In early 2025 several outlets reported that Arm was hiring engineers for its own server CPU project, possibly tied to Stargate or to a SoftBank-aligned customer. Arm has officially denied competing with its licensees. The Cortex / Neoverse business is built on Arm being neutral; going into chip-making would unwind that neutrality the same way the Nvidia acquisition would have.
| CEO | Years | Background |
|---|---|---|
| Robin Saxby | 1991 to 2006 | Motorola, European Silicon Structures |
| Warren East | 2006 to 2013 | Texas Instruments, ARM since 1994 |
| Simon Segars | 2013 to 2022 | One of the original ARM engineers, joined 1991 |
| Rene Haas | February 2022 to present | Nvidia executive, joined Arm 2013[17] |
Segars carried Arm through SoftBank's acquisition and the Nvidia attempt. Haas inherited a company with the Nvidia deal collapsed and ran it through the IPO and the AI buildout, which has been the most lucrative window in the company's history. Haas's stated strategy is unambiguously AI-led: more ARMv9 royalty mix, more Neoverse and CSS adoption among hyperscalers, and a heavier investment in software (Kleidi AI libraries, the Arm Total Compute platform) to make the IP easy to ship into AI workloads.
Arm is not the only RISC ISA in serious use. RISC-V is the open ISA challenger, with no licensing fees and a growing ecosystem in microcontrollers, accelerators, and storage controllers. Several Arm partners (notably Western Digital, Nvidia in some embedded controllers, and parts of the Chinese chip industry) now use RISC-V for parts of their stack to reduce dependency on Arm royalties. Arm's response has been a mix of pricing reform, more open ISA terms (including Custom Instructions), and the Total Design / CSS programs that lower the cost of going to silicon.
In the data center, the competition is x86 (Intel Xeon, AMD Epyc), and at the AI end, the competition is also vertical integration by hyperscalers building their own TPU-style accelerators. Arm wins when it is the most efficient host CPU for an accelerator stack. After the failed Nvidia deal, CUDA and Arm Neoverse have ended up as deeply intertwined platforms on the technical side anyway. Grace, Grace Hopper, Grace Blackwell, and the entire DGX-class line use Arm CPUs as the host. Nvidia is now one of Arm's most strategic customers in the data center, in the same way Apple is in mobile.
Where Arm cores show up in a typical AI inference cluster, as of early 2026: the host CPU in a Grace Hopper or Grace Blackwell node is Arm Neoverse V2. The host CPU in an AWS Trainium2 or Inferentia2 node is AWS Graviton4 (Neoverse V2). The host CPU in a Microsoft Maia AI accelerator rack is Cobalt 100 (Neoverse N2). The host CPU in a Google TPU rack at scale is increasingly Axion (Neoverse V2), although some racks still use x86 host nodes. Storage controllers use Cortex-R or RISC-V. DPUs and NICs (Nvidia BlueField, AWS Nitro, Pensando) use Arm cores. The board management controller uses a Cortex-M.
That saturation is the main reason Arm's data center royalty revenue has grown faster than the rest of the company since 2023. The smartphone story is mature. The AI infrastructure story is not.