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Apple silicon is the family of ARM architecture system on a chip (SoC) and system in a package (SiP) processors that Apple Inc. designs for its own products, and it is the hardware foundation of Apple's on-device artificial intelligence strategy. Every chip pairs custom CPU cores, an Apple-designed GPU, and a dedicated neural processing unit called the Neural Engine with a shared pool of unified memory, an arrangement that lets Macs run large language model inference locally at memory capacities consumer PC graphics cards cannot match. The family encompasses the A-series chips that power iPhones and most iPads, the M-series chips that power Macs and high-end iPads since 2020, and several smaller specialized chips for the Apple Watch, AirPods, Vision Pro, and cellular modems. All current Apple silicon products are manufactured by TSMC on leading-edge process nodes.[17] Since September 2025, the family has also included the N-series wireless networking chips, beginning with the N1 introduced across the iPhone 17 lineup.[25]
Apple began designing its own application processors after acquiring P.A. Semi in 2008,[21] shipping the first Apple-designed chip, the Apple A4, in the original iPad in April 2010.[17] The company surprised the industry in 2013 with the Apple A7, the first 64-bit chip in a smartphone,[12] and added a dedicated neural network accelerator called the Apple Neural Engine to the A11 Bionic in 2017.[18] In June 2020, Apple announced a two-year transition of its Mac line away from Intel x86 processors to Apple silicon,[1] beginning with the Apple M1 in November 2020.[2] The most recent generation, the M5 family announced in October 2025, was marketed by Apple as ushering in "the next big leap in AI performance for Apple silicon," with up to 3.5 times the AI performance of the M4.[11]
For artificial intelligence and machine learning, Apple silicon is central to Apple's strategy of on-device AI and edge AI. Each chip combines high-performance and high-efficiency CPU cores, an Apple-designed GPU, and a Neural Engine that accelerates matrix and convolution workloads. The shared LPDDR5 or LPDDR5X memory connected to the package, called unified memory, gives the CPU, GPU, and Neural Engine simultaneous access to the same data without copying. This architecture has made M-series Macs popular platforms for running large language model inference locally and motivated Apple's release of the MLX framework in December 2023,[16] alongside the existing Core ML runtime, to give researchers and developers efficient access to the hardware.
| Field | Detail |
|---|---|
| Designed by | Apple Inc. |
| Manufactured by | TSMC |
| Architecture | ARM, 64-bit ARMv8-A and ARMv9-A |
| First chip | Apple A4 (April 2010)[17] |
| First Mac chip | Apple M1 (November 10, 2020)[2] |
| Current iPhone chip | Apple A19 / A19 Pro (September 2025)[25] |
| Current Mac chip | Apple M5 family (October 2025)[11] |
| Current Mac pro chips | Apple M5 Pro / M5 Max (March 2026)[23] |
| Process nodes used | TSMC N5, N5P, N4P, N3B, N3E, N3P |
| Lead designer | Johny Srouji[22] |
| Major divisions | A-series (iPhone, iPad), M-series (Mac, iPad Pro, Vision Pro), S-series (Apple Watch), H-series (AirPods), W- and U-series (wireless), C-series (modem), R-series (sensor coprocessor) |
Apple began building an in-house silicon team in April 2008 with the acquisition of P.A. Semi, a low-power processor design firm in Santa Clara, for approximately $278 million.[21] The deal added roughly 150 engineers to Apple,[21] and the team was led by Johny Srouji, who had joined Apple earlier that year after holding senior chip-design roles at Intel and IBM.[22] In April 2010, Apple acquired the chip-design firm Intrinsity for approximately $121 million, adding more talent to the silicon group.[17]
The first chip designed by the new team, the Apple A4, debuted with the original iPad announced on January 27, 2010 and launched on April 3, 2010, and shortly after appeared in the iPhone 4 and the second-generation Apple TV.[17] The A4 used a single ARM Cortex-A8 CPU core and a PowerVR GPU, fabricated by Samsung.[17] The follow-on Apple A5 in 2011 introduced a dual-core Cortex-A9 design.[17]
On September 10, 2013, Apple announced the Apple A7, the world's first 64-bit ARM SoC shipped in a smartphone, inside the iPhone 5s.[12] The A7 used Apple's first custom CPU core design, codenamed Cyclone, and implemented the ARMv8-A instruction set.[17] Industry observers, including engineers at Qualcomm, were caught off guard by the early move to 64-bit. The A7 also introduced the Secure Enclave, a separate coprocessor for biometric and key-management operations.[12]
Apple branded its 2017 chip the A11 Bionic, marketing the addition of the first Apple Neural Engine, a dedicated neural processing unit (NPU) with two cores capable of about 0.6 trillion operations per second (TOPS).[18] The Neural Engine first powered Face ID and Animoji on the iPhone X.[18] Apple expanded the unit to eight cores in the A12 Bionic (2018), reaching about 5 TOPS, and to 16 cores in the A14 Bionic (2020) at about 11 TOPS.[17]
Alongside main application processors, Apple released the T1 (2016) and T2 (2017 to 2018) security and controller chips for Intel-based Macs. The T2, derived from the A10 Fusion, ran a separate operating system named bridgeOS and handled Touch ID, the Secure Enclave, SSD encryption, an image signal processor for the FaceTime camera, and audio playback.[17]
At the all-virtual Worldwide Developers Conference on June 22, 2020, Apple CEO Tim Cook announced a two-year transition of the Mac line from Intel processors to Apple silicon.[1] Apple shipped a Developer Transition Kit, a Mac mini using the iPad Pro's A12Z chip, to registered developers during WWDC week.[1]
Apple unveiled the Apple M1 on November 10, 2020.[2] Built on TSMC's N5 (5 nm) process, the M1 contained 16 billion transistors, an 8-core CPU split between four high-performance Firestorm cores and four high-efficiency Icestorm cores, an integrated 7- or 8-core GPU, a 16-core Neural Engine rated at 11 TOPS, and a unified memory architecture with up to 16 GB of LPDDR4X.[2][17] The first M1 Macs, the MacBook Air, the 13-inch MacBook Pro, and the Mac mini, shipped on November 17, 2020.[2]
Apple announced the M1 Pro and M1 Max on October 18, 2021 alongside redesigned 14-inch and 16-inch MacBook Pro models.[3] The M1 Pro contained 33.7 billion transistors and offered 200 GB/s of memory bandwidth, while the M1 Max contained 57 billion transistors with 400 GB/s of memory bandwidth and up to 64 GB of unified memory.[3] On March 8, 2022, Apple introduced the M1 Ultra and the Mac Studio; the M1 Ultra fused two M1 Max dies via a custom interconnect Apple branded UltraFusion, yielding 114 billion transistors, up to 128 GB of unified memory, and 800 GB/s of memory bandwidth.[4]
Apple announced the M2 at WWDC on June 6, 2022.[5] Built on a refined N5P process, the M2 contained 20 billion transistors and raised the Neural Engine to 15.8 TOPS.[5] The M2 Pro and M2 Max followed in January 2023,[24] and on June 5, 2023 Apple announced the M2 Ultra alongside the Apple Silicon Mac Pro, completing the Intel-to-Apple-silicon transition for the Mac line.[6][20] The M2 Ultra contained 134 billion transistors, supported up to 192 GB of unified memory, and provided 800 GB/s of memory bandwidth.[6]
On October 30, 2023, Apple held its Scary Fast event to announce the M3, M3 Pro, and M3 Max, the first personal computer chips fabricated on TSMC's N3B (3 nm) process.[7] The M3 family introduced hardware-accelerated mesh shading and ray tracing in the GPU and a feature Apple called Dynamic Caching.[7] The M3 Max with a 16-core CPU offered 400 GB/s of memory bandwidth and supported up to 128 GB of unified memory.[7] Apple announced the M3 Ultra on March 5, 2025, in a refreshed Mac Studio; it offered 32 CPU cores, an 80-core GPU, a 32-core Neural Engine, up to 512 GB of unified memory, and 819 GB/s of memory bandwidth.[10]
Apple introduced the M4 on May 7, 2024 inside the new iPad Pro, the first time an M-series chip debuted in an iPad rather than a Mac.[8] The M4 is built on TSMC's N3E process, contains 28 billion transistors in the base configuration, and houses a 16-core Neural Engine rated at 38 TOPS.[8] The M4 Pro and M4 Max followed on October 30, 2024 in updated MacBook Pro and Mac mini models.[9] The M4 Max, with a 16-core CPU and a 40-core GPU, supports up to 128 GB of unified memory at 546 GB/s.[9]
The Apple A17 Pro, announced on September 12, 2023 in the iPhone 15 Pro and iPhone 15 Pro Max, was the first 3 nm A-series chip.[19] Built on TSMC's N3B process, it carries roughly 19 billion transistors and a 16-core Neural Engine rated at 35 TOPS, more than double the A16's 17 TOPS.[19] The Apple A18 and A18 Pro launched on September 9, 2024 in the iPhone 16 lineup; both are built on a refined version of N3 and are the first iPhone chips designed from the start with Apple Intelligence features in mind.[17] The A19 and A19 Pro launched in the iPhone 17 family on September 9, 2025, fabricated on TSMC's N3P process.[17][25] The A19 Pro added Neural Accelerators to each GPU core, an architectural feature shared with the M5.[25] Apple says the Neural Accelerators in the A19 Pro's GPU cores deliver up to 3 times the peak GPU compute of the previous generation.[25]
Apple announced the base Apple M5 on October 15, 2025 in a new 14-inch MacBook Pro, an updated iPad Pro, and a refreshed Vision Pro.[11] Manufactured on TSMC's third-generation 3 nm process, the M5 features a next-generation 10-core GPU with a Neural Accelerator integrated into each GPU core,[11] which Apple cites as delivering up to 3.5 times the AI performance of the M4 and over 4 times the peak GPU compute for AI compared to the M4.[11][26] The base M5 supports up to 32 GB of LPDDR5X unified memory at 153 GB/s, a roughly 30 percent increase over the M4.[11]
On March 3, 2026, Apple announced the M5 Pro and M5 Max alongside updated 14-inch and 16-inch MacBook Pro models.[23][27] The two chips are the first built on what Apple calls the Fusion Architecture, which joins two third-generation 3 nm dies into a single SoC through high-bandwidth, low-latency packaging, letting the CPU, GPU, Neural Engine, media engines, unified memory controller, and Thunderbolt 5 controllers scale across both dies while preserving the unified memory model.[23] The generation also revised Apple's CPU core naming: in their top configurations, both chips provide an 18-core CPU that pairs 6 cores Apple brands as super cores, tuned for single-threaded speed, with 12 performance cores for multithreaded throughput.[23] The M5 Pro scales to a 20-core GPU, 64 GB of unified memory, and 307 GB/s of memory bandwidth, while the M5 Max reaches a 40-core GPU, 128 GB of unified memory, and 614 GB/s.[23] Each GPU core in both chips carries a Neural Accelerator, both retain a 16-core Neural Engine, and Apple cites over 4 times the peak GPU compute for AI of the previous generation and over 6 times that of the M1 Pro and M1 Max.[23] The accompanying MacBook Pro models add the N1 wireless networking chip for Wi-Fi 7 and Bluetooth 6, up to twice the SSD performance of the prior generation, and up to 24 hours of battery life.[27]
Apple silicon chips are AI chips in the broad sense that every modern variant integrates dedicated machine-learning acceleration on the same die as the CPU and GPU. A modern Apple silicon SoC is a single package containing the CPU, GPU, Neural Engine, and a large amount of supporting fixed-function hardware, with LPDDR5 or LPDDR5X DRAM packaged on the same substrate. Major architectural elements common to most Apple silicon chips include:
The Apple Neural Engine (ANE) is the dedicated NPU block inside Apple silicon. Apple introduced it in the A11 Bionic on September 12, 2017.[18] The ANE is exposed to applications through Core ML, which transparently splits inference workloads between the CPU, GPU, and ANE based on the model graph and the operations supported by each engine. Although Apple has not published a detailed architectural reference, the ANE is widely understood to be a tile-based matrix-multiply engine optimized for low-precision integer and FP16 inference rather than training.
The ANE has been used in production for Face ID matching, Apple Photos scene and face recognition, Live Text in Camera, on-device dictation and Siri request handling, real-time translation, and most recently for Apple Intelligence on-device models. The ANE has scaled in published peak throughput as follows.[17]
| Chip | Year | ANE cores | Peak throughput |
|---|---|---|---|
| A11 Bionic | 2017 | 2 | 0.6 TOPS |
| A12 Bionic | 2018 | 8 | 5 TOPS |
| A13 Bionic | 2019 | 8 | 6 TOPS |
| A14 Bionic | 2020 | 16 | 11 TOPS |
| M1 | 2020 | 16 | 11 TOPS |
| A15 Bionic | 2021 | 16 | 15.8 TOPS |
| M2 | 2022 | 16 | 15.8 TOPS |
| A16 Bionic | 2022 | 16 | 17 TOPS |
| A17 Pro | 2023 | 16 | 35 TOPS |
| M3 | 2023 | 16 | 18 TOPS |
| A18 / A18 Pro | 2024 | 16 | 35 TOPS |
| M4 | 2024 | 16 | 38 TOPS |
With the M5 generation, Apple shifted some matrix-multiply workloads onto Neural Accelerators inside each GPU core, complementing the dedicated ANE.[11]
Apple announced Apple Intelligence at WWDC on June 10, 2024 as a system-level set of generative AI features for iPhone, iPad, and Mac. The first features shipped on October 28, 2024 in iOS 18.1, iPadOS 18.1, and macOS Sequoia 15.1.[13] Hardware requirements were the iPhone 15 Pro, iPhone 15 Pro Max, the entire iPhone 16 family, any iPad with the A17 Pro or any M-series chip, and any Mac with an M-series chip.[13]
Apple Intelligence runs in three tiers depending on the difficulty of the request:
The choice to anchor Apple Intelligence on the Neural Engine, GPU, and unified memory architecture is the reason older iPhone models without the A17 Pro and Macs with Intel processors are excluded from the feature set.
At WWDC on June 9, 2025, Apple opened the on-device Apple Intelligence model to third-party apps through the Foundation Models framework and published architectural details of its foundation models: the on-device model is an approximately 3-billion-parameter language model compressed to 2 bits per weight using quantization-aware training, while the server-side model uses a Parallel-Track Mixture-of-Experts transformer that runs on Private Cloud Compute.[28]
Apple is also moving Private Cloud Compute onto US-built hardware. In February 2025, the company announced a 250,000-square-foot server factory in Houston as part of a four-year, $500 billion US investment program, with the facility slated to open in 2026 to build the Apple silicon servers behind Apple Intelligence.[29] In October 2025, CEO Tim Cook said the Houston facility had come online ahead of schedule and had begun shipping American-made Apple Intelligence servers to Apple's data centers.[30] Separately, The Information reported in December 2024 that Apple was designing its first dedicated AI server chip, codenamed Baltra, with Broadcom, targeting mass production in 2026.[31]
At WWDC on June 8, 2026, Apple introduced a rebuilt Siri delivered as a standalone app and said the next generation of Apple Foundation Models was developed in collaboration with Google and its Gemini model family.[32] The redesigned assistant keeps simple requests on-device, sends moderately complex requests to Private Cloud Compute, and routes the heaviest reasoning to a custom Gemini model, reported at roughly 1.2 trillion parameters under a licensing deal reported at about $1 billion per year, hosted on Google Cloud infrastructure rather than on Apple silicon servers.[33] The new Siri and the broader Apple Intelligence updates ship with iOS 27, iPadOS 27, and macOS 27 in fall 2026.[32][33]
Apple maintains several developer-facing technologies that target Apple silicon for machine learning and AI workloads.
coremltools package. Core ML automatically partitions inference graphs across the CPU, GPU, and Neural Engine.grad and vmap, uses lazy graph evaluation, and stores arrays in unified memory so that the same buffer can be operated on by the CPU or GPU without copies.[16] Apple frames the unified-memory design as the core advantage: "Operations in MLX can run on either the CPU or the GPU without needing to move memory around."[34] In November 2025, Apple Machine Learning Research reported that MLX uses the Neural Accelerators in the M5's GPU cores for dedicated matrix multiplication, bringing time-to-first-token under 10 seconds for a dense 14-billion-parameter model and under 3 seconds for a 30-billion-parameter mixture-of-experts model, with token-generation throughput 19 to 27 percent higher than the M4 in line with the chip's greater memory bandwidth.[34]mps device backend in PyTorch 1.12, announced in May 2022, jointly developed with Apple's Metal team.[15]The practical advantage for local large language model inference comes from two properties that data-center and consumer GPUs do not normally combine: a very large pool of memory addressable by the GPU, and high bandwidth to that memory. Because Apple's unified memory is shared across the CPU, GPU, and Neural Engine, the GPU can address the entire system memory rather than a smaller dedicated VRAM pool. A consumer NVIDIA GeForce RTX 4090, for example, ships with 24 GB of VRAM, whereas an M3 Ultra Mac Studio can be configured with up to 512 GB of unified memory,[10] enough to hold an entire 400-billion-parameter quantized model in memory at once. Apple's own benchmarks illustrate the capacity point at the laptop scale: a 24 GB M5 MacBook Pro "can easily hold a 8B in BF16 precision or a 30B MoE 4-bit quantized, keeping the inference workload under 18GB for both of these architectures."[34]
The second property, memory bandwidth, governs how fast the model generates tokens. LLM decoding is memory-bandwidth bound, so the 400 GB/s of the M3 Max,[7] 546 GB/s of the M4 Max,[9] 614 GB/s of the M5 Max,[23] and 819 GB/s of the M3 Ultra[10] translate directly into higher token-generation throughput than the 50 to 100 GB/s typical of a desktop x86 system. Starting with the M5, the Neural Accelerators added to each GPU core target the other half of the workload: generating the first token is compute bound, and Apple states the "GPU Neural Accelerators provide dedicated matrix-multiplication operations, which are critical for many machine learning workloads."[34] Together these properties make Apple silicon a preferred platform for individual developers and researchers running open-weight models, complementing rather than replacing data-center GPU clusters.
| Chip | Announced | Process node | Max transistors | Max GPU cores | Max ANE TOPS | Max unified memory |
|---|---|---|---|---|---|---|
| M1 | Nov 10, 2020[2] | TSMC N5 | 16 billion | 8 | 11 | 16 GB |
| M1 Pro | Oct 18, 2021[3] | TSMC N5 | 33.7 billion | 16 | 11 | 32 GB |
| M1 Max | Oct 18, 2021[3] | TSMC N5 | 57 billion | 32 | 11 | 64 GB |
| M1 Ultra | Mar 8, 2022[4] | TSMC N5 | 114 billion | 64 | 22 | 128 GB |
| M2 | Jun 6, 2022[5] | TSMC N5P | 20 billion | 10 | 15.8 | 24 GB |
| M2 Pro | Jan 17, 2023[24] | TSMC N5P | 40 billion | 19 | 15.8 | 32 GB |
| M2 Max | Jan 17, 2023[24] | TSMC N5P | 67 billion | 38 | 15.8 | 96 GB |
| M2 Ultra | Jun 5, 2023[6] | TSMC N5P | 134 billion | 76 | 31.6 | 192 GB |
| M3 | Oct 30, 2023[7] | TSMC N3B | 25 billion | 10 | 18 | 24 GB |
| M3 Pro | Oct 30, 2023[7] | TSMC N3B | 37 billion | 18 | 18 | 36 GB |
| M3 Max | Oct 30, 2023[7] | TSMC N3B | 92 billion | 40 | 18 | 128 GB |
| M3 Ultra | Mar 5, 2025[10] | TSMC N3B | 184 billion | 80 | 36 | 512 GB |
| M4 | May 7, 2024[8] | TSMC N3E | 28 billion | 10 | 38 | 32 GB |
| M4 Pro | Oct 30, 2024[9] | TSMC N3E | n/a | 20 | 38 | 64 GB |
| M4 Max | Oct 30, 2024[9] | TSMC N3E | n/a | 40 | 38 | 128 GB |
| M5 | Oct 15, 2025[11] | TSMC N3P | n/a | 10 | n/a | 32 GB |
| M5 Pro | Mar 3, 2026[23] | TSMC N3P, dual die | n/a | 20 | n/a | 64 GB |
| M5 Max | Mar 3, 2026[23] | TSMC N3P, dual die | n/a | 40 | n/a | 128 GB |
Transistor counts marked as "n/a" were not published by Apple at announcement.
| Chip | Year | iPhone debut | Process node | Neural Engine TOPS |
|---|---|---|---|---|
| A11 Bionic | 2017 | iPhone 8, X[18] | TSMC 10 nm | 0.6 |
| A12 Bionic | 2018 | iPhone XS, XR | TSMC N7 | 5 |
| A13 Bionic | 2019 | iPhone 11 | TSMC N7P | 6 |
| A14 Bionic | 2020 | iPhone 12 | TSMC N5 | 11 |
| A15 Bionic | 2021 | iPhone 13 | TSMC N5P | 15.8 |
| A16 Bionic | 2022 | iPhone 14 Pro | TSMC N4P | 17 |
| A17 Pro | 2023 | iPhone 15 Pro[19] | TSMC N3B | 35 |
| A18 / A18 Pro | 2024 | iPhone 16 family | TSMC N3E | 35 |
| A19 / A19 Pro | 2025 | iPhone 17 family[25] | TSMC N3P | n/a |
Apple silicon laptops and desktops have consistently led mainstream client CPU benchmarks since 2020. Following the M1 launch, the Apple chip topped Geekbench 5 single-core scores for laptops by a significant margin while consuming roughly one-quarter of the power of competing Intel Tiger Lake parts. Each subsequent generation has held or extended that lead in single-core benchmarks. The high-end Pro and Max variants compete with workstation-class x86 parts in multithreaded workloads at substantially lower thermal and power budgets, while Ultra variants such as the M3 Ultra contend with discrete-GPU workstations in graphics and compute throughput.
The other consistently cited advantage is memory bandwidth. A modern x86 desktop typically offers between 50 and 100 GB/s of bandwidth from DDR5 memory, while the M3 Max delivers 400 GB/s,[7] the M4 Max 546 GB/s,[9] and the M3 Ultra 819 GB/s,[10] all of it shared with the GPU and Neural Engine. For machine-learning inference, where memory bandwidth is the dominant bottleneck for large language model decoding, this gap allows M-series Macs to outperform much more expensive PC workstations on local LLM workloads. The dual-die M5 Max, introduced in March 2026, lifted peak Mac laptop memory bandwidth to 614 GB/s.[23]
Apple has been TSMC's lead customer for every major leading-edge node since N7 in 2018, typically locking up most of TSMC's first-year capacity for a new process. The Apple A12 Bionic was TSMC's first commercial 7 nm chip, the A14 was TSMC's first 5 nm chip, and the A17 Pro and the M3 family were the first commercial chips on TSMC's 3 nm N3B process.[7][17][19] The M4 generation moved to N3E, a higher-yielding refinement of the 3 nm node, and the A19 and A19 Pro adopted N3P.[17] Apple has also been reported as the lead customer for TSMC's upcoming 2 nm (N2) process.[35] Apple's exclusive early access to each new node is widely cited as a structural performance and efficiency advantage versus competitors using older nodes. In January 2025, mass production of Apple chips began at TSMC's Fab 21 in Arizona, where Apple is the largest customer, bringing Apple silicon manufacturing to the United States.[29] TSMC scheduled volume production of its 2 nm N2 process for late 2025, and supply-chain reports indicate Apple reserved roughly half of the initial 2 nm capacity for the A20 chip generation expected in the iPhone 18 family in late 2026.[35]
| Family | Purpose | Notable chips |
|---|---|---|
| S-series | Apple Watch SiPs | S1 (2015) through S10 (Apple Watch Series 10, 2024) |
| T-series | Mac security and controller | T1 (2016), T2 (2017 to 2018) |
| H-series | AirPods audio | H1 (2019), H2 (AirPods Pro 2, 2022) |
| W-series | Wireless coprocessors | W1 (AirPods, 2016), W2 (Apple Watch Series 3), W3 (Apple Watch Series 4) |
| U-series | Ultra Wideband | U1 (iPhone 11, 2019), U2 (iPhone 15, 2023) |
| R-series | Mixed-reality sensor coprocessor | R1 (Apple Vision Pro, 2024) |
| C-series | Cellular modem | C1 (iPhone 16e, February 2025) |
| N-series | Wireless networking | N1 (iPhone 17 family, 2025)[25] |
The S10 in the Apple Watch Series 10, released September 20, 2024, is a SiP with a dual-core 64-bit processor, a 4-core Neural Engine, and 64 GB of storage.[17] The R1 in the Apple Vision Pro processes input from 12 cameras, five sensors, and six microphones and reportedly delivers a 12-millisecond photon-to-photon latency.[17] The C1 in the iPhone 16e, released in February 2025, is Apple's first cellular modem,[14] supporting sub-6 GHz 5G but not millimeter-wave; it is the result of Apple's 2019 acquisition of Intel's modem business.[17]
At the iPhone 17 launch on September 9, 2025, Apple introduced two further chip families. The N1 wireless networking chip provides Wi-Fi 7, Bluetooth 6, and Thread across the entire iPhone 17 lineup and improves features such as Personal Hotspot and AirDrop;[25] Engadget noted that it replaces combo radio chips previously supplied by Broadcom.[36] The C1X modem in the iPhone Air is, according to Apple, up to twice as fast as the C1 while using 30 percent less energy, making it the most power-efficient modem in an iPhone.[25] Together with the A19 Pro, Apple described the iPhone Air as carrying the most Apple-designed chips of any iPhone.[25] The N1 subsequently came to the Mac in the MacBook Pro models introduced in March 2026.[27]
The November 2020 launch of the M1 was widely covered as a watershed event for the personal computer industry. AnandTech, NotebookCheck, and other technical reviewers reported that the chip matched or beat contemporary high-end Intel and AMD laptop CPUs on single-threaded performance while running silently in fanless designs, and that battery life on M1 MacBook Air units exceeded 15 hours of mixed use. Intel CEO Pat Gelsinger publicly framed Apple silicon as competitive pressure during the company's 2021 product strategy refresh. Qualcomm's Snapdragon X Elite, announced in October 2023, was widely interpreted as the PC industry's answer to Apple silicon, and a 2024 collaboration between NVIDIA and MediaTek on a Windows-on-ARM chip was reported with similar framing.
Apple's vertical integration of chip design, operating system, compiler toolchain, and applications is frequently cited as the structural reason competitors have struggled to match the platform-level efficiency of Apple silicon. Tim Cook has described in-house silicon as one of Apple's most important strategic decisions, and lead designer Johny Srouji was promoted to Chief Hardware Officer in April 2026, formalizing the centrality of silicon to Apple's hardware roadmap.[37] The promotion, effective April 20, 2026, expanded Srouji's role to lead Hardware Engineering alongside the hardware technologies organization, and followed Apple's announcement that hardware engineering chief John Ternus had been selected to succeed Tim Cook as chief executive.[37]
For the AI ecosystem in particular, the unified memory architecture has shifted expectations of where local inference can run. The release of MLX in late 2023[16] and the rapid optimization of llama.cpp and other projects for Metal backends has made Apple silicon a preferred platform for individual developers and researchers running open-weight large language models on personal hardware, complementing rather than replacing data-center GPU clusters from NVIDIA.