Frozen v2 (Google AI chip)

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Frozen v2 is the informal internal codename for a specialized artificial-intelligence inference chip that Google is reportedly developing to run its Gemini models more cheaply and with far less energy. According to a July 20, 2026 report by the subscription technology outlet The Information, which cited two people with direct knowledge of the matter, the chip would hardwire parts of the Gemini model architecture directly into silicon, so that a single design serves one family of models rather than any model.^[1][2] The reporting frames Frozen v2 as Google's response to a severe shortage of AI computing capacity, one that has reportedly caused internal tension and pushed Google Cloud to turn down deals with outside customers.^[1][3]

Everything publicly known about Frozen v2 comes from press reporting, not from Google. This article describes what was reported, by whom, and when. It does not assert that the chip exists in any finished form, that it performs as described, or that it will ship. The central figure attached to the project, that Frozen v2 could be 6 to 10 times more efficient than Google's newest TPU, is an internal projection that Google employees working on the chip relayed to reporters through anonymous sources. It is not a benchmarked measurement, no hardware has been demonstrated publicly, and the design is described as still unsettled. Asked about the report, Google neither confirmed nor denied the specific project; a company statement to TechCrunch said only that its teams "are constantly researching and experimenting with new innovations" and that "not every project moves into production."^[3] As of the July 22, 2026 publication window, Google had not announced Frozen v2.

What was reported

On July 20, 2026, The Information published a report that Google is working on a new server chip, informally dubbed "Frozen v2," that would directly integrate the blueprint of its Gemini model to serve those models more efficiently.^[1] The scoop was attributed to two people with direct knowledge of the matter. Within hours the story was picked up by mainstream technology and financial press, including TechCrunch, Tom's Hardware, The Decoder, Techzine, SiliconANGLE, Quartz, CNBC, and a Reuters wire summary.^{[2][3][4][5][6][7][8][9]}

The core claims relayed from The Information's sources were consistent across the secondary coverage:

• The chip would bake part of the Gemini architecture permanently into the silicon.^[1][4]
• Google employees working on it projected it could be "6 to 10 times more efficient" than the newest generation of Google's existing homegrown AI chips, measured by tokens served per unit of power.^[1][4][6]
• Google plans to deploy the chips "as soon as 2028," with the design still being decided.^[1][3]
• Frozen is intended as a new branch of Google-designed chips distinct from, and not a replacement for, the tensor processing unit (TPU).^[1][6]
• The project is partly a reaction to a compute-capacity crunch that has prompted Google Cloud to decline outside deals.^[1][3]

Because the underlying report sits behind a paywall, most readers encountered the story through secondary outlets that transcribed and summarized it. The Information itself credited anonymous sources rather than any Google announcement, so even the most detailed quotes are reported claims, not confirmed specifications.

Reported design approach

The reported idea behind Frozen is the difference between a general-purpose accelerator and a model-specific one. A TPU, like Nvidia's widely used GPUs, is a programmable AI accelerator built to work with many different models. Because it does not know in advance which model it will run, it makes many runtime decisions and moves a large amount of data as it interacts with whatever model is loaded.^[1] According to The Information's account, Frozen v2 would instead have some of those decisions for Gemini built directly into the hardware, reducing the number of steps the chip must take and the amount of data it has to move around per query.^[1][2]

What "freezing" means, and the weights-versus-architecture distinction

The name "Frozen" comes from the idea of permanently etching part of the model into the silicon.^[1] The most important technical point in the reporting, and the one most often garbled in social-media summaries, is which part gets frozen.

Frozen v2 reportedly freezes the architecture, meaning the model's structural blueprint: its computational graph, the arrangement of layers, and the dataflow patterns that define how a Gemini model is shaped.^[4][6] It does not freeze the weights, the numerical parameters that a model learns during training and that determine how it actually responds. According to the reporting, Google would still be able to update the chip's weights, essentially loading new settings, so the same hardware could run improved Gemini models over time.^[1][10] Techzine noted that engineers were still deciding exactly how much of the model would be embedded.^[6]

This distinction matters because an earlier version of the concept went further. The Decoder and Tom's Hardware report that the original "Frozen" design is traced to an earlier proposal by Jeff Dean, chief scientist of Google DeepMind, which would have baked Gemini's weights themselves into the chip.^[5][4] According to those accounts, Google set that approach aside because silicon tied to a single set of weights would work with only one specific model version and would become outdated too quickly.^[5][4] The "v2" in Frozen v2 refers to freezing the architecture instead of the weights, a deliberately more flexible bet. (A widely shared social-media summary of the story compressed this into the chip being "descended from a Jeff Dean design that proposed etching Gemini weights directly into silicon," which the secondary reporting broadly corroborates, though the attribution of the origin idea belongs to those outlets and not to a Google statement.)

Reducing computation and data movement

The efficiency case rests on removing overhead. When a general-purpose chip runs a model, it repeatedly reads instructions and shuttles intermediate results between compute units and memory. A chip designed around one architecture can hardwire fixed sequences of those operations so the circuitry performs them in fewer passes and moves less data.^[1][2] In conventional AI software, collapsing several sequential operations into one step is a known optimization technique called operator fusion; SiliconANGLE observed that Frozen v2's reported reduction in the number of calculations "suggests that it will also support a form of operator fusion," in this case fixed in hardware rather than applied in software.^[8] This is the outlet's technical interpretation of the design, not a specification stated in the original report.

Reported performance projection

The single most cited figure is that Frozen v2 could be 6 to 10 times more efficient than the newest version of Google's existing TPUs, based on the number of tokens (a basic unit of AI consumption) it can serve per unit of power.^[1][4] Tom's Hardware rendered the same metric as "6 to 10 times more tokens per watt than latest TPUs."^[4]

Several caveats belong with that number, and the more careful outlets stated them:

• It is an internal projection by engineers working on the chip, relayed through anonymous sources, not a measured or independently verified result.^[1][6] Techzine described it explicitly as "a projection, not a measured performance metric."^[6]
• It applies to inference efficiency (serving responses), not training, and is expressed as tokens per unit of power rather than raw speed.^[6]
• It is a projected figure "when it launches," a target years away for a design that is reportedly not finalized.^[1][3]

Some headlines rounded the range up to "10x" or "tenfold," which overstates the reported claim; the sourced range is 6 to 10 times, and the low end is as much a part of the projection as the high end.^[11][12] The reporting also suggests a secondary benefit beyond energy: because the chip does less work per query, one of The Information's sources said it could respond to queries faster, potentially enabling new latency-sensitive AI applications.^[1]

Reported timeline and scale

Google plans to deploy the Frozen chips "as soon as 2028," according to the sources, and engineers are still deciding the chip's main features and how its parts will work together.^[1][3] The 2028 framing is a target, not a committed ship date, and the phrase "as soon as" signals the earliest reported case rather than a schedule.

On scale, the reporting indicates Frozen v2 is not meant to match the TPU in volume. The Decoder reported that Google views the chip partly as a trial run for more specialized silicon and would produce it at a smaller volume than its TPU line.^[5] The Frozen project is described as creating a new branch of homegrown chips that complements the TPU for specific Gemini inference tasks rather than replacing the general-purpose line.^[1][6]

Relationship to Google's TPU line

Frozen v2 is reported as a sibling to, not a successor of, Google's TPU program. The current flagship is the seventh-generation TPU, Ironwood, which Google announced at Cloud Next in 2025 as an inference-optimized design with 192 GB of HBM3e per chip and pods that scale to 9,216 chips.^[13][14] Ironwood is a general-purpose accelerator: it runs dense and mixture-of-experts models, handles training and inference, and is sold to Google Cloud customers as well as used internally.^[13] Frozen v2, by contrast, is reported as a narrow inference part tuned to one model family.

The reported contrast can be summarized as follows. Every entry in the Frozen v2 column is a reported or projected characteristic, not a confirmed specification.

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Context: why Google would reportedly do this

The reporting places Frozen v2 squarely inside an economics problem rather than a pure research effort. Google is described as grappling with a shortage of AI computing capacity severe enough to fuel internal tensions and to compel Google Cloud to turn down deals with outside customers.^[1][3] In that framing, an inference chip that serves 6 to 10 times more tokens per unit of power would stretch scarce capacity: the same power and the same data-center footprint would serve far more Gemini traffic.

The pressure is structural. Inference, the cost of answering user queries, now dominates AI compute for a company serving models to billions of users, and it scales with usage rather than with a one-time training run. Energy per token has become a first-order constraint on both cost and how fast data centers can be built out. Purpose-built silicon is one of the few levers that attacks tokens-per-watt directly rather than simply buying more general-purpose chips. Financial commentators framed the reported chip as a way to relieve that crunch and to serve Google Cloud's large order backlog, which several outlets put at roughly $462 billion.^[15][12]

Technical background: why hardwiring an architecture can save energy, and why it is a bet

Most of the energy a modern accelerator spends on inference goes not into arithmetic but into moving data (fetching weights and activations from memory) and into the overhead of being programmable. A general-purpose chip must decode instructions, schedule work, and route intermediate results through a memory hierarchy because it cannot assume anything about the model it will run. A chip built around one fixed architecture can eliminate much of that: the dataflow is known in advance, so operations can be fused, buffers sized to the model's exact shapes, and on-chip memory laid out to keep the most-used values close to compute. Removing off-chip trips is where most of the reported savings would come from, which is consistent with The Information's description of a chip that reduces the number of steps and the amount of data it moves.^[1] This is a specialization-versus-generality trade that runs through the history of computing, from digital signal processors to fixed-function video codecs: give up flexibility, and you can win a large efficiency multiple on the narrow workload you kept.

The catch is the flip side of the same trade. Freezing an architecture into silicon assumes that architecture will still be the right one years later. As The Information's own reporting put it, the chip "represents a bet that Google will stick with its current approach to building its Gemini models," and it would be usable for later Gemini generations "only if they are based on the same underlying model architecture" in use when it was designed.^[1] Silicon takes years to design and fabricate; models change in months. Frozen v2's hedge, freezing the architecture while leaving weights updatable, buys some room (Google can retrain and reload the model), but it does not protect against a structural change, for example a move away from the current transformer-style design toward a different building block. A structural mismatch cannot be patched with new weights; it requires new silicon.^[16]

Risks and criticism

The clearest criticism raised in the coverage is architectural obsolescence. Gadget Review put the wager plainly: "Hardcoding today's Gemini architecture is a wager that tomorrow's Gemini won't look radically different," warning that "a chip physically tuned to 2026-era Gemini could be badly misaligned with whatever Gemini looks like by 2028," and that "even updatable weights can't fix a structural mismatch: that requires entirely new silicon."^[16] The outlet characterized the approach as "trading flexibility for speed," which it called "the oldest bargain in computing," and cited analyst concern that fixed-function AI infrastructure "carries real obsolescence risk when model architectures shift faster than production cycles allow."^[16]

Three specific risks follow from that:

1. Timing mismatch. A multi-year silicon cycle is aimed at a fast-moving model landscape. If the dominant Gemini architecture in 2028 differs materially from the one frozen around 2026, the chip could arrive already misaligned with the models it was built for.
2. Narrow addressable use. Unlike a TPU, a Frozen chip cannot be repurposed for other models or workloads, so the investment pays off only if Gemini demand on that exact architecture stays high through the chip's life.^[1][6]
3. Historical precedent. Model-specific and workload-specific accelerators have a mixed record precisely because software moves faster than hardware. A long-running argument in AI, sometimes called the "bitter lesson," holds that general methods riding broad compute tend to overtake hand-specialized approaches, which is a reason to be cautious about betting silicon on any single model design.

It is worth separating the reporting from the commentary that surrounded it. Framings such as "the transformer architecture is done evolving" or "the model is the chip now" appeared in viral social-media posts about the story, not in The Information's report, and should not be read as claims Google or the sources made. The reporting supports a narrower statement: Google is reportedly willing to bet that Gemini's architecture is stable enough, and its inference volume large enough, to justify a chip that assumes both.

Industry context: other workload-specific silicon

Frozen v2, if real, would join a broad 2026 move by large technology companies to build their own inference-focused chips and reduce dependence on Nvidia GPUs. What would make it unusual is how narrow it is: most custom accelerators specialize by workload (inference in general, or transformer inference), whereas Frozen v2 is reported to specialize by one model family.

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Etched's Sohu: the closest public analogue

The most illuminating comparison is Etched's Sohu, because it makes a similar public bet and, unlike Frozen v2, has been described in detail and put in front of investors. Etched, founded in 2022 by Harvard dropouts and Thiel Fellows Gavin Uberti, Chris Zhu, and Robert Wachen, describes Sohu as the first ASIC specialized for transformer models.^[17][18] The company's own claims, which have not been independently benchmarked on production hardware, are striking: an eight-chip Sohu server running Meta's Llama 70B at more than 500,000 tokens per second, which Etched says would replace 160 Nvidia H100 GPUs, on a chip built on TSMC's 4 nm process with 144 GB of HBM3 per chip.^[17] The trade-off is explicit and total: Etched states that by specializing, Sohu cannot run non-transformer models such as convolutional networks, LSTMs, or state-space models at all.^[17] In June 2026 Etched said it had raised about $800 million at a roughly $5 billion valuation and booked more than $1 billion in orders, though its first systems had not yet shipped.^[18]

Sohu and Frozen v2 sit at different points on the same spectrum. Sohu bets that the transformer, as a general architecture, is durable enough to hardwire; it can run any transformer, from any vendor, that fits. Frozen v2 is reported to go one step narrower, betting on the specifics of Google's own Gemini architecture rather than transformers in general. That makes Frozen v2 potentially more efficient (it can assume more) but more exposed to a single design choice. Because Etched has published its bet and its numbers, it offers readers a way to judge the idea on evidence rather than on a scoop: the promise (very large efficiency multiples from specialization) and the risk (a chip that is worthless if the architecture it froze goes out of style) are the same in both cases.

The hyperscaler field

Other model-adjacent silicon fills out the landscape. Amazon has shipped Inferentia (an inference-only accelerator since 2019) and Trainium (now in a third generation on a 3 nm process) inside AWS, and Meta has adopted AWS silicon while building out its own MTIA line for recommendation and language-model inference at scale.^[19][20] Microsoft announced Maia 200 in January 2026 as an inference-focused accelerator on a TSMC 3 nm process with 216 GB of HBM3e.^[21] In June 2026, OpenAI and Broadcom unveiled Jalapeno, a purpose-built LLM-inference ASIC that OpenAI said it designed in about nine months, part of a plan to deploy roughly 10 gigawatts of custom accelerators.^[22][23] Startups Groq (whose LPU targets low-latency token generation) and Cerebras (whose wafer-scale WSE-3 runs models like Llama 70B at thousands of tokens per second) attack the same inference-latency problem with different, non-model-specific hardware.^[24] Against that field, a chip frozen to one company's own model would be the most specialized bet of all.

Reception

The report moved markets before Google said anything of substance. Alphabet shares rose roughly 3% (some outlets reported as much as about 3.7%) on July 20, 2026, the day the story broke, with the pop landing just ahead of Alphabet's second-quarter earnings.^[7][9][25] Yahoo Finance framed the reaction in the context of investors watching Alphabet's capital spending and return on its AI infrastructure, and noted the report followed earlier coverage of delays to a Gemini model release.^[25] Financial commentary connected the reported chip to Google's vertical-integration story (owning both the frontier model and the silicon that runs it) and to Google Cloud's large reported order backlog.^[15][12]

Technology coverage was more measured, and several outlets foregrounded the caveats: that this is a reported project, that the efficiency figure is a projection rather than a benchmark, that the design is unfinished, and that the whole approach is a bet on architectural stability.^[6][16] The recurring analytic point across outlets was that Frozen v2, if it ships, would be less a moonshot than a signal: evidence that a hyperscaler believes its own model architecture has stabilized enough to be worth casting into metal.

ELI5

Chips today are like a general kitchen: they can cook any recipe, but they waste time and energy reading the recipe, fetching ingredients, and cleaning up between steps. Google is reportedly building a chip that is more like a machine in a factory built to make exactly one dish (its Gemini AI) as fast and cheaply as possible. Because the machine already "knows" the recipe's shape, it skips a lot of steps and uses much less electricity for each answer it serves, reportedly 6 to 10 times less power per answer than Google's current chips, though that is an engineer's estimate for a chip that does not exist yet, not a tested result. It can still be taught new tricks (you can change the settings, or "weights"), but if the basic recipe ever changes in a big way, the machine becomes much less useful, and you would have to build a new one. Google has not officially said it is doing any of this; the story comes from reporters citing anonymous insiders.

See also

• Tensor processing unit (TPU)
• TPU Ironwood
• Gemini
• AI chip
• ASIC
• Inference
• OpenAI and Broadcom accelerators
• AI accelerator comparison

References

1. The Information, "Google Is Developing a Chip That Bakes Its Gemini Model Into the Silicon" (report on the "Frozen v2" inference chip), July 20, 2026 (subscription). https://www.theinformation.com ↩
2. Reuters (wire summary), "Google plans new chip to run Gemini models more efficiently, the Information reports," July 20, 2026. https://www.peoplenewstoday.com/news/en/2026/07/20/1148839.html.Google-plans-new-chip-to-run-Gemini-models-more-efficiently-the-Information-reports.html ↩
3. Lucas Ropek, "Google is working on a new AI chip designed to make Gemini more efficient," TechCrunch, July 20, 2026. https://techcrunch.com/2026/07/20/google-is-working-on-a-new-ai-chip-designed-to-make-gemini-more-efficient/ ↩
4. "Google reportedly developing 'Frozen v2' chip with Gemini's architecture etched into the silicon," Tom's Hardware, July 2026. https://www.tomshardware.com/tech-industry/google-reportedly-developing-frozen-v2-chip-with-geminis-architecture-etched-into-the-silicon ↩
5. Matthias Bastian, "Google's 'Frozen v2' chip reportedly bakes Gemini's architecture directly into silicon for efficiency gains," The Decoder, July 20, 2026. https://the-decoder.com/googles-frozen-v2-chip-reportedly-bakes-geminis-architecture-directly-into-silicon-for-efficiency-gains/ ↩
6. Berry Zwets, "Google is working on 'Frozen v2': Gemini partially embedded in silicon," Techzine Global, July 20, 2026. https://www.techzine.eu/news/infrastructure/143013/google-is-working-on-frozen-v2-gemini-partially-embedded-in-silicon/ ↩
7. "Alphabet stock pops on report it's developing a more efficient AI chip," CNBC, July 20, 2026. https://www.cnbc.com/2026/07/20/alphabet-googl-stock-ai-chip-report.html ↩
8. Maria Deutscher, "Google reportedly developing 'Frozen v2' AI chip optimized for Gemini models," SiliconANGLE, July 20, 2026. https://siliconangle.com/2026/07/20/google-reportedly-developing-frozen-v2-ai-chip-optimized-gemini-models/ ↩
9. "Google developing Gemini-specific chip called Frozen v2," Quartz, July 2026. https://qz.com/google-gemini-chip-frozen-tpu-efficiency-072026 ↩
10. "Google's 'Frozen v2' chip etches Gemini's design into the silicon," MetaTalks, July 2026. https://www.metatalks.ai/googles-frozen-v2-chip-etches-geminis-design-into-the-silicon/ ↩
11. "Google's Frozen v2 Chip Hardwires Gemini Architecture: Up to Tenfold Inference Efficiency," TechTimes, July 21, 2026. https://www.techtimes.com/articles/321152/20260721/googles-frozen-v2-chip-hardwires-gemini-architecture-tenfold-inference-efficiency.htm ↩
12. "Google Secretly Optimizes Gemini: Mysterious New Chip Unveiled with 10x TPU-Crushing Energy Efficiency," 36Kr (English), July 2026. https://eu.36kr.com/en/p/3904844399445638 ↩
13. "Google Unveils 7th-Gen TPU Ironwood with 9,216-Chip Superpod, Taking Aim at NVIDIA," TrendForce, November 7, 2025. https://www.trendforce.com/news/2025/11/07/news-google-unveils-7th-gen-tpu-ironwood-with-9216-chip-superpod-taking-aim-at-nvidia/ ↩
14. "Ironwood TPUs and new Axion-based VMs for your AI workloads," Google Cloud Blog, 2025. https://cloud.google.com/blog/products/compute/ironwood-tpus-and-new-axion-based-vms-for-your-ai-workloads/ ↩
15. "Why Google's New AI Chip Is the Key to Unlocking Its Massive $462 Billion Backlog," 24/7 Wall St., July 21, 2026. https://247wallst.com/investing/2026/07/21/why-googles-new-ai-chip-is-the-key-to-unlocking-its-massive-462-billion-backlog/ ↩
16. C. da Costa, "Google's 'Frozen v2' Chip Wants to Bake Gemini Directly Into Silicon," Gadget Review, July 21, 2026. https://www.gadgetreview.com/googles-frozen-v2-chip-wants-to-bake-gemini-directly-into-silicon ↩
17. Etched, "Meet Sohu, the fastest AI chip of all time" (Sohu transformer ASIC announcement), 2024. https://x.com/Etched/status/1805625693113663834 ↩
18. "Nvidia competitor Etched hits $5B valuation, $1B in sales for AI chip," TechCrunch, June 30, 2026. https://techcrunch.com/2026/06/30/nvidia-competitor-etched-hits-5b-valuation-1b-in-sales-for-ai-chip/ ↩
19. "AWS 'Bullish' On Homegrown Trainium AI Accelerators," The Next Platform, October 31, 2025. https://www.nextplatform.com/cloud/2025/10/31/aws-bullish-on-homegrown-trainium-ai-accelerators/ ↩
20. "Meta's new MTIA lineup joins hyperscalers' unified push for dedicated inferencing chips," Tom's Hardware, 2026. https://www.tomshardware.com/tech-industry/semiconductors/metas-mtia-chip-lineup-joins-hyperscaler-push-to-replace-nvidia-at-inference ↩
21. "Maia 200: The AI accelerator built for inference," The Official Microsoft Blog, January 26, 2026. https://blogs.microsoft.com/blog/2026/01/26/maia-200-the-ai-accelerator-built-for-inference/ ↩
22. "OpenAI and Broadcom unveil LLM-optimized inference chip," OpenAI, June 2026. https://openai.com/index/openai-broadcom-jalapeno-inference-chip/ ↩
23. "Broadcom and OpenAI unveil custom-built Jalapeno inference processor," Tom's Hardware, June 24, 2026. https://www.tomshardware.com/tech-industry/artificial-intelligence/broadcom-and-openai-unveil-custom-built-jalapeno-inference-processor-openais-first-chip-is-a-massive-reticle-sized-asic-built-in-an-ultra-fast-nine-month-development-cycle ↩
24. "Groq vs Cerebras: LLM Inference Speed Comparison 2026," Speko. https://speko.ai/benchmark/groq-vs-cerebras ↩
25. Ines Ferre, "Alphabet's Google developing new chip for AI model, stock jumps," Yahoo Finance, July 21, 2026. https://finance.yahoo.com/markets/article/alphabets-google-developing-new-chip-for-ai-model-stock-jumps-151128221.html ↩