Xiaomi XRING O100
Xiaomi XRING O100 is a dedicated AI accelerator designed by Xiaomi for local large-model inference on consumer devices. Xiaomi introduced it at an XRING chip technical briefing in Beijing on August 24, 2026, alongside the XRING O3 mobile system-on-chip and XRING D100 automotive processor.[1][2][3]
As of September 3, 2026, O100 was not commercially available. Xiaomi said that the chip had completed returned-silicon validation and that commercial use was planned for 2027. The company had not named a production device, price, or exact release date.[1][2]
| Attribute | Publicly described detail |
|---|---|
| Designer | Xiaomi |
| Product role | Dedicated accelerator for on-device large-model inference |
| Announced | August 24, 2026 |
| Logic process | 6 nm, according to Xiaomi's launch material |
| Packaging | Xiaomi-reported wafer-on-wafer 3D stacking with hybrid bonding |
| Stack | Xiaomi-reported two high-speed DRAM wafers and one NPU compute wafer |
| Dedicated AI memory | 3.5 GB, according to Xiaomi's launch specifications |
| Near-memory bandwidth | Xiaomi-reported 1.22 TB/s |
| Compute | Xiaomi-reported 14 NPU cores and XRING high-bandwidth matrix bus |
| Availability | Development and validation complete; commercial use planned for 2027 |
Purpose and system role
O100 is a specialized neural processing unit, not the general-purpose processor that runs a phone or computer by itself. Xiaomi presented it as a companion to XRING O3 for accelerating its MiMo large language models locally. The design focuses on moving model data between memory and the NPU over short, dense connections, a response to the memory-bandwidth limits that often constrain generation on small devices.[1][4]
Xiaomi's launch material places O100 within its broader on-device AI strategy. Counterpoint Research reported that Xiaomi was targeting categories including smartphones, PCs, robots, and electric vehicles. Those categories describe intended uses, not confirmed 2027 products.[4]
Packaging and memory design
Xiaomi describes O100 as a three-wafer stack: two wafers of high-speed DRAM above one 6 nm NPU compute wafer. The company says it uses wafer-on-wafer packaging, hybrid bonding without conventional micro-bumps, and face-to-face metal-layer connections. Xiaomi reported a 1.4 micrometer bond pitch. Xinhua also reported 3.5 GB of dedicated AI memory from the launch specifications.[1][3]
Counterpoint lists 28,672 effective data lines, 14 NPU cores, and a Xiaomi-designed high-bandwidth matrix bus. Xiaomi says the bus can switch topology for different phases of language-model inference, using a ring during prompt processing and a broadcast arrangement during token decoding.[1][4] These are company specifications. No public teardown or independently audited data sheet reviewed for this article validated the physical stack or interconnect.
Xiaomi reports 1.22 TB/s of near-memory bandwidth. That number describes the local interface associated with O100's stacked memory, not demonstrated system-wide unified-memory bandwidth. Public information does not establish that every memory pool in an O100-based system would be accessible at that rate.[4][6]
Performance evidence
Xiaomi reported an up to result of 330 tokens per second when O100 was paired with O3. Counterpoint identifies the Xiaomi-lab workload as a 3-billion-parameter model. The company did not disclose enough conditions to reproduce or compare the result, including quantization, batch size, prompt and output lengths, sustained duration, or chip power.[1][4][6]
National Business Daily separately reported on a launch demonstration using an O3 plus O100 engineering terminal. The prototype had its camera system removed, used a redesigned board and active cooling, and displayed 295 tokens per second for a Xiaomi MiMo edge model.[5] This was a controlled prototype demonstration, not an independent benchmark of a shipping device. It also does not establish that a passively cooled consumer product would sustain the same rate.
Manufacturing and availability
Reuters reported, citing an unnamed source familiar with nonpublic plans, that Xiaomi had contracted TSMC to manufacture O100 as a 6 nm NPU. Xiaomi and TSMC did not comment to Reuters on the manufacturer, production process, or shipment targets.[2] TSMC manufacturing should therefore be treated as credible source-based reporting rather than an officially confirmed specification. The report does not identify the stacked-DRAM supplier or the company responsible for final hybrid-bond assembly.
Xiaomi distinguished O100's status from O3. Its August announcement said O3 was entering production for Xiaomi 18 Fold, while O100 and D100 had completed validation and were planned for commercial use in 2027.[1][2] The phone-shaped O100 system shown at the briefing was an engineering demonstration terminal. It was not evidence that Xiaomi 18 Fold or another named retail device would contain O100.
Relationship to other XRING chips
The three processors announced at the briefing have different roles:
| Processor | Announced role | Status stated in August 2026 |
|---|---|---|
| XRING O3 | General-purpose flagship mobile SoC | Entering production for Xiaomi 18 Fold |
| XRING O100 | Dedicated high-bandwidth AI accelerator | Validated; commercial use planned for 2027 |
| XRING D100 | Automotive and local AI processor | Validated; commercial use planned for 2027 |
Xiaomi also displayed an AI Cube prototype combining O3, O100, and D100. Counterpoint described it as a 150 W prototype for local-model experiments, not an announced retail product.[4] Neither the prototype's total memory nor D100's separate memory support should be conflated with O100's 3.5 GB dedicated AI memory or its local 1.22 TB/s interface.
Public evidence limits
As of September 3, 2026, Xiaomi had not publicly disclosed O100's die size, transistor count, chip TDP, precision-specific compute throughput, price, production volume, or a software SDK. Public material also did not establish support for common open inference frameworks or expose an open accelerator API.[6]
The 1.22 TB/s and 330-token-per-second figures remain Xiaomi claims rather than independently reproduced measurements. There was no public production hardware for reviewers to test, and the launch demonstration used a purpose-built actively cooled system. Comparisons with phone memory, HBM-equipped accelerators, or desktop AI systems are therefore not like-for-like performance benchmarks.
References
- ^Xiaomi official company account. "Lei Jun: New generation XRING chips officially released, XRING O3, XRING O100, XRING D100." Sohu Timeline, August 24, 2026. timeline.sohu.com/...45QewgH7Nc
- ^Pan, Che, and Eduardo Baptista. "Xiaomi launches new Xring chip, partners with TSMC for production, sources say." Reuters, August 24, 2026. marketscreener.com/...sources-say-ce7858dbd98bfe20
- ^Xinhua. "Xiaomi XRING launches three self-developed chips." August 25, 2026. xinhuanet.com/...c
- ^Jatwala, Akash. "From Smartphone to AI: Xiaomi's Shift Toward a Multi-domain AI Chip Ecosystem." Counterpoint Research, September 1, 2026. counterpointresearch.com/...main-ai-chip-ecosystem
- ^Yang, Hui. "Xiaomi releases three self-developed chips." National Business Daily, August 26, 2026. m.nbd.com.cn/...4557290
- ^Witt, Allan. "Xiaomi AI Cube Targets Local LLMs With 1.22 TB/s Near-Memory Bandwidth." Hardware Corner, August 26, 2026. hardware-corner.net/...-ai-cube-targets-local-llms
Improve this article
Add missing citations, update stale details, or suggest a clearer explanation. Every suggestion is reviewed for sourcing before it goes live.
v1 · 1,082 words · full history
Fact-checks are independent of edits: a reviewer re-verifies the article against its sources and stamps the date. How we verify
Research and drafting on this wiki are AI-assisted, under named human editorial standards. How AI is used here
Reviewer note: Independently checked against cited and current primary sources on 2026-09-03.
Cite this page: AI Wiki. "Xiaomi XRING O100." aiwiki.ai, updated 3 Sept 2026, fact-checked 3 Sept 2026. CC BY 4.0. https://aiwiki.ai/wiki/xring_o100