USFP (Ultra-Dense Small Form Factor Pluggable)
The Ultra-Dense Small Form Factor Pluggable (USFP) is a proposed optical transceiver form factor for 400 Gb/s-per-lane electrical signaling, announced jointly by NVIDIA and Cisco on October 12, 2026, at the start of the Open Compute Project (OCP) Global Summit 2026. The companies describe it as the first pluggable module designed for 400 Gb/s-per-lane electrical signals. The first planned modules carry 16 full-duplex lanes in a footprint about the size of an OSFP module, and the design has a stated path to 32 lanes and 12.8 Tb/s of aggregate capacity. NVIDIA and Cisco say USFP delivers four times the bandwidth density and about 1.3 times the power efficiency of 200 Gb/s-per-lane pluggable optics. As of October 19, 2026, USFP was a planned specification, not a shipping product: no sampling or availability date had been given, and the companies said they would publish it as an open specification through a community-led multi-source project.[1][2][3][6]
Announcement
NVIDIA and Cisco issued the same press release on their newsrooms on October 12, 2026 (Cisco's copy is datelined Santa Clara, California), the first day of the OCP Global Summit at the San Jose McEnery Convention Center (October 12-15).[1][2][16] The release said the two companies "announced plans for" USFP, which it called "a new high-density 400Gb/s-per-lane optical module designed to equip the hardware ecosystem for the next generation of AI factories using pluggable transceivers." It named TE Connectivity and Amphenol as partners building USFP cages, connectors and modules, "with additional partners expected to join." The release said the collaboration builds on the companies' existing work to make NVIDIA Spectrum-X Ethernet networking and Cisco Silicon One-based networks work together.[1]
Cisco published an executive blog post the same day by Bill Gartner, senior vice president and general manager of optical systems and optics, and Will Eatherton, senior vice president of networking engineering. It described USFP as providing "a path supporting both 200G and 400G SerDes based systems and ASICs, helping customers scale from today's 1.6T fabrics."[3] Cisco also folded the announcement into its wider OCP 2026 release, alongside updates to its Silicon One switching chips.[4]
In the press release, NVIDIA senior vice president Gilad Shainer said: "Building the world's largest AI factories starts with rethinking the smallest of connections." Gartner said the companies had concluded that "scaling pluggable optics to 400Gb/s per lane would require more than another incremental extension of today's module designs."[1]
Network World reported that USFP is not considered part of the current NVIDIA-Cisco partnership. It quoted NVIDIA marketing director Brian Sparks, speaking at a pre-briefing, as saying USFP is "not part of the partnership. It's just Cisco and us and others in the ecosystem believe that USFP is the right solution moving forward."[7]
Specifications
The table lists what the two companies disclosed. All performance figures are vendor claims about a design that had not been independently measured as of October 19, 2026.
| Attribute | Disclosed value | Source |
|---|---|---|
| Full name | Ultra-Dense Small Form Factor Pluggable | [1] |
| Electrical lane rate | 400 Gb/s per lane | [1][3] |
| Initial lane count | 16 full-duplex lanes | [1][3] |
| Initial aggregate capacity | 6.4 Tb/s (16 x 400 Gb/s) | [3] |
| Future lane count | 32 full-duplex lanes "and more" | [1] |
| Maximum stated capacity | 12.8 Tb/s (32 lanes) | [1][3] |
| Footprint | Comparable to an OSFP module | [1] |
| Bandwidth density | 4x that of 200 Gb/s-per-lane pluggables | [1] |
| Power efficiency | About 1.3x that of 200 Gb/s-per-lane pluggables | [1] |
| Module power | Up to 100 W without a dedicated embedded cooling circuit in the transceiver | [1] |
| Host connector | Two-dimensional array connector with two-step insertion | [1] |
| Target hosts | Switches and SuperNICs, for Ethernet AI fabrics | [1] |
| Lower-rate support | Connector also improves performance at 200 Gb/s per lane | [1] |
Lane count and the 12.8 Tb/s figure
The headline "up to 12.8 Tb/s" figure refers to the future 32-lane configuration. Cisco's blog states that 16 lanes at 400 Gb/s "will deliver 6.4T of aggregate capacity, four times the bandwidth density of today's 1.6T pluggables," and that "the architecture can scale to 32 lanes, providing a path to 12.8T of aggregate capacity."[3] NAND Research reported that Cisco describes these as two module flavors, x16 and x32.[6] Most coverage followed this reading, including The Register, StorageReview and ServeTheHome.[5][8][9] Converge Digest took a different reading, counting the 16-lane module as 6.4 Tb/s in each direction, or 12.8 Tb/s when both directions are summed.[10] The press release itself says only that "customers will be able to achieve 12.8Tb/s of overall capacity with USFP."[1]
The fourfold density claim follows from the arithmetic: USFP doubles both the lane count (8 to 16) and the per-lane rate (200 to 400 Gb/s) of eight-lane 200 Gb/s modules such as the 1.6 Tb/s OSFP, in a similar footprint.[1][6] NAND Research reported that NVIDIA explained the 1.3x efficiency figure this way: moving to 400G SerDes doubles per-lane bandwidth while increasing power by roughly 1.5 times. NAND noted that no independent measurement supported the figure.[6]
Design
Connector
According to the companies, the new two-dimensional array connector uses a two-step insertion design that engages the high-speed contacts only after the module has been inserted. They say this reduces contact wear, improves signal integrity, and makes insertion force more predictable.[1] The Register described it as a two-phase mechanism in which the pluggable is first inserted into the cage and a second mechanism then makes the electrical connection. It also pointed out that four times as many lanes per module means four times as many electrical contacts that must seat correctly.[5]
Power and cooling
USFP supports up to 100 W of module power dissipation without a separate, dedicated embedded cooling circuit inside the transceiver. The companies say this reduces switch design complexity and improves reliability.[1] For comparison, The Register estimated that a high-end pluggable optic today draws on the order of 20 W.[5] NAND Research said the module fits both air-cooled and liquid-cooled system designs, but warned that a 100 W ceiling per port across a dense faceplate creates chassis-level heat loads that will push most deployments toward liquid-cooled switches.[6]
Optics
The release says all USFP configurations support optical designs that reduce latency and power "by simplifying signal processing," and that the form factor supports a broad range of optical technologies and connection distances.[1] The companies had not published Ethernet port mappings, optical modulation options, supported reach classes, or qualification methods as of NAND Research's October 13 note.[6]
Rationale
NVIDIA and Cisco frame front-panel density as the limit on scaling AI fabrics. When a switch runs out of ports, further growth can require additional switch layers and optical links, which add latency, power and cost. The companies say that doubling lane count and per-lane bandwidth lets Ethernet fabrics connect more 1.6 Tb/s endpoints without adding network tiers.[1] The Register gave an illustration: a future 204.8 Tb/s switch would need only 16 USFP ports to serve 128 endpoints at 1.6 Tb/s, and a single USFP module could consolidate eight GPUs' worth of cabling into one fiber optic bundle. It also noted the trade-off: a failed laser or digital signal processor in a USFP module affects far more links than one in a conventional pluggable, though less than a failure in co-packaged or near-package optics.[5]
USFP keeps the pluggable operating model, in which modules can be replaced from the front panel and optics can be bought separately from switches.[3][6] NAND Research noted that USFP is mechanically and electrically distinct from OSFP and requires new switch and NIC designs; neither company claimed compatibility with existing OSFP ports.[6]
Relation to co-packaged optics
NVIDIA's participation drew comment because the company has invested heavily in co-packaged optics (CPO), which moves optical engines into the switch package and removes faceplate transceivers on the switch side. Its CPO switch lines include Spectrum-X Photonics and Quantum-X Photonics.[5][6] The Register observed that NVIDIA's NICs still rely on pluggables, and speculated that its interest in USFP "likely comes down to densification."[5] NAND Research called USFP a hedge for NVIDIA, giving customers not ready for CPO a pluggable path at the same 400G lane rate.[6]
Cisco's blog presented the choice as open-ended: "The industry continues to innovate across pluggable, near-packaged, co-packaged, and other emerging optical architectures, each with different advantages and tradeoffs."[3] Converge Digest described USFP as complementing, not replacing, work on CPO, near-package optics and socketed optical engines.[10] eefocus argued that matching near-package optics on per-module bandwidth does not give USFP the same system energy efficiency, because a faceplate module still requires long electrical traces across the switch board.[12]
Comparison with other form factors
USFP entered a field that already included several approaches to faceplate density. The table summarizes form factors that sources compared it against.
| Form factor | Backers | Electrical lanes | Maximum module capacity (stated) | Cooling | Source |
|---|---|---|---|---|---|
| OSFP | OSFP MSA | 8 | 1.6 Tb/s (8 x 200G) | Integrated heatsink; OSFP-RHS variant uses a riding heatsink | [13] |
| OSFP-XD | OSFP MSA | 16 | 3.2 Tb/s | Not stated in source; ports not compatible with OSFP | [13] |
| XPO | Arista-led MSA | 64 | 12.8 Tb/s at 200G per lane | Integrated liquid-cooling cold plate, up to 400 W at launch (NAND Research cites up to 500 W) | [14][15] |
| USFP | NVIDIA, Cisco, with TE Connectivity and Amphenol | 16 initially, 32 planned | 6.4 Tb/s initially, 12.8 Tb/s planned, at 400G per lane | Up to 100 W without embedded cooling circuit | [1][3] |
The OSFP (Octal Small Form Factor Pluggable) MSA defines eight-lane modules supporting 400 Gb/s, 800 Gb/s or 1.6 Tb/s, with up to 36 ports in a 1U front panel. Its 16-lane OSFP-XD variant doubles faceplate density and is not cross-compatible with OSFP.[13] Arista announced the XPO (eXtra-dense Pluggable Optics) MSA in March 2026 for a 64-lane, 12.8 Tb/s liquid-cooled module, claiming 204.8 Tb/s per Open Compute rack unit and about four times the front-panel density of 1.6T OSFP optics.[14][15] NAND Research reported that XPO has a roadmap to 25.6 Tb/s at 400G per lane.[6]
Analysts saw XPO as the closest rival. NAND Research said the absence of Arista from USFP, and of NVIDIA and Cisco from XPO, pointed to "at least two rival 400G pluggable ecosystems competing for the same faceplates," and that the outcome would depend on which form factor the next wave of 400G switch silicon ships with. It judged USFP stronger on thermal pragmatism, since a 100 W module without an internal cooling loop fits more chassis designs, and weaker on raw density.[6] eefocus noted that XPO and USFP cages are physically incompatible.[12]
Status and open questions
As of October 19, 2026, NVIDIA and Cisco had given no sampling schedule or availability date, and the open specification had not been published.[6][9][11] NAND Research and eefocus both noted that neither company announced 400G-per-lane switch silicon at OCP 2026, so the form factor was defined ahead of the switch ASICs it is meant to serve.[6][12] The new top-of-rack switching chip Cisco announced at the same event, the 51.2 Tb/s Silicon One G302, uses 200G SerDes, and NVIDIA's Spectrum-6 also operates at 200G per lane.[4][6]
Standards work on 400G-class electrical lanes was also at an early stage. In November 2025 the Optical Internetworking Forum released its CEI-448G Framework Document, which describes application spaces, technical challenges and possible solution paths for electrical interfaces at 448 Gb/s per lane, and examines modulation schemes such as PAM6 and PAM8. Lightwave reported that the next phase would be individual projects for different reach classes that define detailed electrical parameters, FEC architectures and test methods.[17]
ServeTheHome's Patrick Kennedy predicted that "with Cisco and NVIDIA behind USFP, it will become an industry standard."[8] Converge Digest listed publication of the multi-source specification, additional suppliers, interoperability demonstrations and system-level power measurements as the milestones still ahead.[10]
References
- ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10 ^11 ^12 ^13 ^14 ^15 ^16 ^17 ^18 ^19 ^20 ^21 ^22 ^23NVIDIA. "NVIDIA and Cisco Introduce New Pluggable Optics Form Factor to Scale AI Factories." NVIDIA Newsroom, October 12, 2026. nvidianews.nvidia.com/...tor-to-scale-ai-factories
- ^1 ^2Cisco. "NVIDIA and Cisco Introduce New Pluggable Optics Form Factor to Scale AI Factories." Cisco Newsroom, October 12, 2026. newsroom.cisco.com/...optics-to-scale-ai-factories
- ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10Bill Gartner and Will Eatherton. "Cisco and NVIDIA Announce USFP: Expanding the Path to AI Connectivity." Cisco Blogs, October 12, 2026. blogs.cisco.com/...ing-the-path-to-ai-connectivity
- ^1 ^2Cisco. "Cisco Advances Scalability and Openness at OCP 2026." Cisco Newsroom, October 12, 2026. newsroom.cisco.com/...ity-and-openness-at-ocp-2026
- ^1 ^2 ^3 ^4 ^5 ^6Tobias Mann. "Cisco, Nvidia team up to build fatter, faster pluggable." The Register, October 14, 2026. theregister.com/...5302970
- ^1 ^2 ^3 ^4 ^5 ^6 ^7 ^8 ^9 ^10 ^11 ^12 ^13 ^14 ^15Steve McDowell. "Cisco and NVIDIA: Optical Ultra-Dense Small Form Factor Pluggable (USFP) Specification." NAND Research, October 13, 2026. nand-research.com/...-pluggable-usfp-specification
- ^Michael Cooney. "Cisco, Nvidia push ultra-dense networking for Ethernet AI fabrics." Network World, October 13, 2026. networkworld.com/...orking-for-ethernet-ai-fabrics
- ^1 ^2Patrick Kennedy. "New USFP Pluggable Optics Form Factor for Higher Speeds from Cisco and NVIDIA." ServeTheHome, October 13, 2026. servethehome.com/...etworking-announcements-nvidia
- ^1 ^2Harold Fritts. "NVIDIA and Cisco USFP Optics Target 400Gb/s per Lane, With MGX 1.2 and DSX OS Updates at OCP 2026." StorageReview, October 12, 2026. storagereview.com/...ics-400gbps-per-lane-ocp-2026
- ^1 ^2 ^3Converge Digest. "NVIDIA and Cisco Unveil 12.8T USFP Pluggable Optics." October 12, 2026. convergedigest.com/...luggable-optics-ai-factories
- ^Futurum Group. "Cisco's USFP Brings 400G-per-Lane Design to NVIDIA's Optical Roadmap." October 13, 2026. futurumgroup.com/...ign-to-nvidias-optical-roadmap
- ^1 ^2 ^3eefocus. "OCP Summit: NVIDIA & Cisco Launch USFP Ultra High Density Pluggable Optical Module for 400Gb/s Per-lane AI Ethernet, Comparison With NPO and XPO Roadmaps." October 15, 2026. global.eefocus.com/...on-with-npo-and-xpo-roadmaps
- ^1 ^2 ^3OSFP MSA. "Welcome to OSFPmsa" (Frequently Asked Questions). Accessed October 19, 2026. osfpmsa.org
- ^1 ^2Converge Digest. "XPO MSA Introduces 12.8 Tbps Pluggable Optics." March 12, 2026. convergedigest.com/...s-12-8-tbps-pluggable-optics
- ^1 ^2XPO MSA. "Welcome to XPOmsa." Accessed October 19, 2026. xpomsa.com
- ^NVIDIA. "NVIDIA at OCP Global Summit 2026." Accessed October 19, 2026. nvidia.com/...ocp-summit
- ^Lightwave. "OIF outlines 448 Gbps interconnects with the CEI-448G Framework." November 17, 2025. lightwaveonline.com/...with-the-cei-448g-framework
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Cite this page: AI Wiki. "USFP (Ultra-Dense Small Form Factor Pluggable)." aiwiki.ai, updated 18 Oct 2026, fact-checked 18 Oct 2026. CC BY 4.0. https://aiwiki.ai/wiki/usfp