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Edge TPU

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The Edge TPU is a small application-specific integrated circuit (ASIC) designed by Google to run machine learning inference on low-power devices. Google's documentation describes it as "a small ASIC designed by Google that provides high performance ML inferencing for low-power devices," rated at 4 trillion fixed-point operations per second (4 TOPS) on 8-bit integer arithmetic while drawing about 2 watts, which works out to roughly 2 TOPS per watt.[1] It runs only TensorFlow Lite models that have been reduced to 8-bit integers and then passed through a separate ahead-of-time tool, the Edge TPU Compiler.[1][10]

Google announced the chip in July 2018 and sold it from March 2019 onward under the Coral brand, a line of development boards, USB and PCIe accelerators, and solderable modules aimed at prototyping and small-volume production.[2][3] Coral became a common way to add a dedicated NPU to a Linux single-board computer, and the Edge TPU is still a supported detector in open-source video-analytics software such as Frigate.[27]

The Edge TPU generation has since been wound down. Google's ASUS IoT manufacturing partner issued end-of-life notices for the 4 GB Dev Board and System-on-Module in July 2024,[15] the last Edge TPU runtime release dates from October 2022,[13] the Coral software repositories on GitHub were archived between July 2025 and April 2026,[16][17][18] and the coral.ai home page now redirects to a Google for Developers page fronting an entirely different design: Coral NPU, an open-source RISC-V accelerator core announced in October 2025.[21]

Announcement and the Cloud IoT pairing

Injong Rhee, then vice president for IoT at Google Cloud, introduced the Edge TPU in a Google Cloud blog post dated July 26, 2018. The post announced two things at once: the chip, and Cloud IoT Edge, a software stack meant to push Google Cloud's data processing and machine learning out to gateways, cameras, and end devices.[2]

Rhee described the chip as "Google's purpose-built ASIC chip designed to run TensorFlow Lite ML models at the edge," and said the design team "were hyperfocused on optimizing for 'performance per watt' and 'performance per dollar' within a small footprint." The relationship to Google's datacenter silicon was stated plainly: "Edge TPUs are designed to complement our Cloud TPU offering, so you can accelerate ML training in the cloud, then have lightning-fast ML inference at the edge."[2]

The announcement came with a development kit promised for that October, built around a system-on-module combining the Edge TPU, an NXP CPU, Wi-Fi, and a Microchip secure element.[2] The cloud half of the 2018 story did not last: Google announced in August 2022 that its Cloud IoT Core device-management service would shut down the following year.[32]

The Coral platform

Coral launched in public beta on March 6, 2019, with the Dev Board, a Camera Module, and the USB Accelerator, plus PCIe variants described as coming soon.[3] The launch post claimed the chip could execute "state-of-the-art mobile vision models such as MobileNet V2 at 100+ fps, in a power efficient manner."[3] Coral's own datasheets later quoted a higher figure for the same model, "almost 400 FPS."[5][6]

The line eventually split into prototyping hardware and production components:

ProductForm factorEdge TPUsPrice (MSRP)
Dev BoardSingle-board computer with removable SoM1$129.99
Dev Board MiniSingle-board computer1$99.99
Dev Board MicroMicrocontroller board1$79.99
USB AcceleratorUSB 3.0 Type-C accessory1$59.99
Mini PCIe AcceleratorHalf-size Mini PCIe1$24.99
M.2 Accelerator (A+E or B+M key)M.2 module1$24.99
M.2 Accelerator with Dual Edge TPUM.2 E-key2$39.99
System-on-Module48 mm x 40 mm x 5 mm pluggable module1$99.99
Accelerator ModuleSolderable multi-chip module1$19.99

Sources: Coral product listing and datasheets.[4][5][6][7][8][9]

The Dev Board and the System-on-Module both pair the Edge TPU with an NXP i.MX 8M SoC (quad Cortex-A53 plus Cortex-M4F) and run Mendel, a Debian derivative maintained by the Coral team.[6][7] The Dev Board Micro is the outlier: instead of an application processor it uses an NXP i.MX RT1176 microcontroller with 64 MB of RAM, an on-board 324 x 324 pixel camera and a microphone, and is programmed through Arduino, FreeRTOS, or a native coralmicro API.[9]

The dual-TPU M.2 card carries a host-compatibility caveat. It presents "two PCIe Gen2 x1 lanes" on an E-key connector, and Coral's datasheet warns that "although the M.2 Specification (section 5.1.2) declares E-key sockets provide two instances of PCIe x1, most manufacturers provide only one," so on many hosts only one of the two Edge TPUs is reachable.[8]

In May 2022 the Coral team announced an agreement with ASUS IoT to scale manufacturing, distribution, and support. That post is the last entry on the Coral news page.[14]

Measured performance

Coral published inference times for a set of vision models, comparing an Intel Xeon Gold 6154 desktop CPU and a quad-core Cortex-A53 embedded CPU against the same models compiled for the Edge TPU. The figures cover model execution only and exclude input preprocessing.[12]

ModelDesktop CPU (ms)Desktop CPU + USB Accelerator (ms)Embedded CPU (ms)Dev Board (ms)
MobileNet v1532.41642.4
MobileNet v2512.61222.6
Inception v1903.43924.1
ResNet-50 V148449176356
VGG168672964595343

On mobile-scale image classification networks the accelerator finishes roughly 45 to 95 times faster than the ARM CPU beside it on the same board. On VGG16 the margin falls to about 13 times, which is the expected result once a model's parameters no longer fit in the roughly 8 MB of on-chip cache and have to stream from external memory.[11][12]

Model requirements and the Edge TPU Compiler

An Edge TPU cannot run an arbitrary neural network. Tensor parameters must be quantized to 8-bit fixed point (int8 or uint8), which means the model has to go through either quantization-aware training or full-integer post-training quantization before conversion to a .tflite file.[10] Further constraints follow from the hardware: tensor sizes must be constant at compile time, with no dynamic shapes; parameters such as bias tensors must also be constant; and tensors must be one-, two-, or three-dimensional, or else have size greater than 1 only in the three innermost dimensions.[10]

The compiled artifact is produced by the Edge TPU Compiler, a command-line tool that converts a .tflite file into one named <input>_edgetpu.tflite. The compiler runs only on 64-bit Debian-derived x86-64 Linux; support for ARM64 hosts such as the Dev Board itself was dropped in version 2.1.[11] Where the graph contains operations the hardware does not support, the compiler partitions it: everything up to the first unsupported operation runs on the Edge TPU and the remainder falls back to the CPU.[10][11]

Because on-chip memory is the scarce resource, the compiler also decides what gets cached. The chip contains roughly 8 MB of SRAM for model parameters, shared with the executable the compiler embeds in the model; a typical compile log reports something like "On-chip memory available for caching model parameters: 6.91MiB."[11] Each compiled model carries a 64-bit caching token, and the runtime clears and rewrites the cache whenever the token changes, so alternating between two separately compiled models forces a cache reload on every switch. Compiling several models together gives them a shared token and divides the cache between them in order.[11] For models too large to cache, the --num_segments option splits the graph across multiple Edge TPUs in a pipeline, with a suggested starting point of one segment per 6 MB of model.[11]

Compiler and runtime versions are coupled. The newest compiler listed in Coral's documentation is 16.0, which targets Edge TPU runtime version 14 by default, with a --min_runtime_version flag for backward compatibility.[11] In September 2024 Google renamed TensorFlow Lite to LiteRT, keeping the .tflite file extension and format unchanged.[25]

Relationship to the datacenter TPU

The Edge TPU shares a brand with Google's datacenter TPU line but is a different device for a different job. Coral's FAQ draws the line explicitly: Cloud TPUs live in Google data centers, are quoted at 420 teraflops, and are built for training complex models, while the Edge TPU handles inference on small, low-power devices.[1] The datacenter lineage continues through TPU v4, v5e, v5p, v6e (Trillium), and TPU7x (Ironwood) as rentable cloud capacity.[33] The Edge TPU is an int8-only coprocessor sold as a $25 module.

The internal organization differs too. A 2021 paper at the International Conference on Parallel Architectures and Compilation Techniques characterized a commercial Edge TPU as a tiled design containing a two-dimensional 64 x 64 array of processing elements, each with a small register file, plus two large SRAM buffers holding model parameters and activations.[19] That is a different structure from the large single systolic array associated with the first datacenter TPU. The paper used a theoretical peak of 2 TFLOP/s as the ceiling in its roofline analysis, a figure quoted in different units from Coral's 4 TOPS and not reconciled with it in the text.[19]

"Edge TPU" also names a family rather than one part. A Google-authored evaluation published at IISWC 2022 describes the accelerators as "a template-based design with highly parameterizable microarchitectural components," and studies three configurations "either already deployed in recent Google products or in the pipeline to be used in future products," running at 800 MHz and 1066 MHz with peak throughputs of 26.2 and 8.73 TOPS and on-chip PE memory between 384 KB and 2 MB.[20] The same paper states that since their 2018 debut, Edge TPUs "have been used in various Google products such as Coral and Pixel phones."[20]

Limitations and criticism

The clearest published criticism of the Edge TPU comes from the 2021 PACT paper, which profiled 24 Google edge neural networks on a commercial part and found three problems.[19]

The first is utilization. The accelerator ran 75.6 percent below peak throughput on average. Convolutional networks and recurrent convolutional networks did best and still reached only 40.7 percent of peak on average, with a minimum of 10.2 percent, while LSTM and Transducer models achieved less than 1 percent of peak.[19] The second is energy efficiency: across all models the chip hit only 37.2 percent of its maximum possible energy efficiency, and 33.8 percent for LSTMs and Transducers.[19] The third is memory. The Edge TPU spent 50.3 percent of its total energy on off-chip memory accesses, and about three quarters of total energy on DRAM for LSTMs and Transducers, even though the on-chip buffers occupy 79.4 percent of the total area.[19] The authors attributed all three to a "one-size-fits-all, monolithic design," and their proposed alternative, Mensa, cut total inference energy by 66.0 percent and raised throughput by 3.1x on the same workloads.[19]

Two further constraints are structural. Google's own FAQ scopes the hardware to "deep feed-forward neural networks (DFF) such as convolutional neural networks (CNN)," which it calls ideal for vision-based applications; transformers and other attention-based architectures fall outside that description.[1] And the toolchain is a proprietary binary that runs on one host architecture, so building for the Edge TPU requires an x86-64 Linux machine even when the target is an ARM board.[11]

Comparison with other edge accelerators

By the mid-2020s the Edge TPU's 4 TOPS looked modest next to newer AI accelerator parts aimed at the same sockets.

AcceleratorComputePowerNotes
Google Edge TPU4 TOPS (int8)about 2 WTensorFlow Lite / LiteRT only, int8 only[1]
Hailo-826 TOPS2.5 W typicalTensorFlow, TensorFlow Lite, Keras, PyTorch, ONNX[28]
NVIDIA Jetson Orin Nano Super67 sparse INT8 TOPS7 W to 25 W8 GB LPDDR5, full CUDA stack[29]
NVIDIA Jetson AGX Orin (64 GB)275 sparse INT8 TOPS15 W to 60 W64 GB LPDDR5[29]
Rockchip RK3588 NPU6 TOPS, triple coreintegrated in SoCint4/int8/int16/FP16/BF16/TF32[30]

Note that the TOPS figures are not measured on a common benchmark and NVIDIA's are quoted for sparse INT8, so the table shows vendor headline numbers rather than like-for-like throughput.

A useful practical comparison comes from Frigate, the open-source network video recorder that made Coral popular in smart home circles. Its hardware documentation now states that "the Coral is no longer recommended for new Frigate installations, except in deployments with particularly low power requirements or hardware incapable of utilizing alternative AI accelerators for object detection," and points users toward Hailo-8, Intel Arc, and NVIDIA GPUs instead. The same page adds that Frigate "will continue to provide support for the Coral TPU for as long as practicably possible given its still one of the most power-efficient devices for executing object detection models."[26] The Edge TPU detector is still supported and runs both a default MobileDet model and quantized YOLOv9 variants for object detection, across USB, PCIe, and M.2 devices.[27] The exception Frigate carves out, low-power deployments, is where a 2 W part still has an argument.

Wind-down of the Edge TPU generation

Google never published a single end-of-life announcement for the Edge TPU, but the supporting evidence is consistent.

DateEvent
November 2021Last Mendel Linux release, 5.3 Eagle[13]
May 2022Last post on the Coral news page[14]
October 2022Last Edge TPU runtime release, version 14[13]
July 2024ASUS IoT end-of-life notice for Coral Dev Board (4G) and TPU SOM Module (4G)[15]
July 2025google-coral/pycoral archived on GitHub[18]
October 2025google-coral/libedgetpu archived on GitHub[17]
April 2026google-coral/edgetpu archived on GitHub[16]

The July 2024 notice, issued by ASUS IoT on Coral-branded letterhead, listed the Dev Board (4G) and TPU SOM Module (4G) as discontinued, both with a 2019 launch date and a 2024 end-of-life date, citing "the material supply issue" and steering customers to the 1 GB variants as replacements.[15]

On GitHub, the main google-coral/edgetpu repository now carries an archive banner and a README stating that "the code that remains in this repo is legacy and might be removed in the future."[16] The runtime and Python libraries it pointed to as actively maintained were themselves archived before it.[17][18] Meanwhile coral.ai no longer serves its own site: the home page and the product, software, and news URLs return an HTTP 302 redirect to developers.google.com/coral, a page about a different product, while the /docs/ URLs redirect to a Google-hosted App Engine mirror that still carries the original Edge TPU documentation.

Coral NPU and the 2026 Coral Dev Board

On October 15, 2025, Google Research and Google DeepMind announced Coral NPU, described as a full-stack, open-source platform for always-on edge AI. It is not a chip Google sells. It is licensable IP, published under the Apache License 2.0, built from RISC-V-compliant blocks: a C-programmable scalar core, a SIMD vector unit compliant with RISC-V Vector extension v1.0, and a quantized multiply-accumulate matrix unit that the announcement describes as still under development.[21][22] The reference design is quoted at around 512 giga operations per second while consuming a few milliwatts, aimed at wearables, hearables, AR glasses, and other ambient sensing devices rather than the camera and gateway sockets the Edge TPU served.[21] Google says it "builds on our original work from Coral."[21]

Synaptics is the first silicon partner. Its Astra SL2610 line, unveiled the same day, contains a Torq NPU subsystem that Google calls "the industry's first production implementation of the Coral NPU architecture," with a toolchain based on IREE and MLIR rather than the Edge TPU Compiler.[21][24] Synaptics rates the Torq NPU in that part at 1 TOPS.[23] Coverage at the time put SL2610 general availability in the second quarter of 2026.[31]

On March 10, 2026, Google Research and Synaptics announced a limited-edition Coral Dev Board built on the Astra SL2610, with CSI and DSI camera and display support, an M.2 slot for Wi-Fi and Bluetooth, USB, and microphone inputs, distributed through Grinn Global and RS and shown at embedded world 2026.[23] Billy Rutledge, a director at Google Research, said the platform "lowers the barrier to building private, always-on Edge AI experiences."[23]

The shared name hides a clean break. Coral now refers to an open RISC-V core that partners implement in their own silicon, programmed through an MLIR-based compiler and runtime. The Edge TPU was a Google-designed fixed-function ASIC programmed through a proprietary compiler that emits a Google-specific TensorFlow Lite variant. Nothing compiled for one runs on the other, and anyone maintaining deployed Edge TPU hardware is maintaining a frozen software stack whose last release predates the rename of TensorFlow Lite.[11][13][21][24]

See also

References

  1. ^Coral, "Edge TPU FAQ." coral.ai/...faq (content served from the Google-hosted mirror at gweb-coral-full.uc.r.appspot.com/...faq)
  2. ^Injong Rhee, "Bringing intelligence to the edge with Cloud IoT," Google Cloud Blog, July 26, 2018. cloud.google.com/...ng-intelligence-edge-cloud-iot
  3. ^"Introducing Coral: Our platform for development with local AI," Google Developers Blog, March 6, 2019. developers.googleblog.com/...lopment-with-local-ai
  4. ^Coral, "Products." gweb-coral-full.uc.r.appspot.com/products
  5. ^Coral, "USB Accelerator datasheet." gweb-coral-full.uc.r.appspot.com/...accelerator
  6. ^Coral, "Dev Board datasheet." gweb-coral-full.uc.r.appspot.com/...dev-board
  7. ^Coral, "System-on-Module datasheet." gweb-coral-full.uc.r.appspot.com/...som
  8. ^Coral, "M.2 Accelerator with Dual Edge TPU datasheet." gweb-coral-full.uc.r.appspot.com/...r-dual-edgetpu
  9. ^Coral, "Dev Board Micro datasheet." gweb-coral-full.uc.r.appspot.com/...dev-board-micro
  10. ^Coral, "TensorFlow models on the Edge TPU." gweb-coral-full.uc.r.appspot.com/...models-intro
  11. ^Coral, "Edge TPU Compiler." gweb-coral-full.uc.r.appspot.com/...compiler
  12. ^Coral, "Edge TPU performance benchmarks." gweb-coral-full.uc.r.appspot.com/...benchmarks
  13. ^Coral, "Software downloads." gweb-coral-full.uc.r.appspot.com/software
  14. ^Coral, "Coral chooses ASUS IoT as OEM partner for global scale," May 5, 2022 (news index). gweb-coral-full.uc.r.appspot.com/news
  15. ^ASUS IoT, "Google CORAL DEV BOARD(4G) EOL Notice," issue date July 2024 (PDF, distributed via Digi-Key). mm.digikey.com/...ASUS_EOL_G650-05370-01.pdf
  16. ^google-coral/edgetpu repository (archived April 19, 2026). github.com/...edgetpu
  17. ^google-coral/libedgetpu repository (archived October 14, 2025). github.com/...libedgetpu
  18. ^google-coral/pycoral repository (archived July 3, 2025). github.com/...pycoral
  19. ^Amirali Boroumand, Saugata Ghose, Berkin Akin, Ravi Narayanaswami, Geraldo F. Oliveira, Xiaoyu Ma, Eric Shiu, and Onur Mutlu, "Google Neural Network Models for Edge Devices: Analyzing and Mitigating Machine Learning Inference Bottlenecks," PACT 2021, arXiv:2109.14320. arxiv.org/...2109.14320
  20. ^Kiran Seshadri, Berkin Akin, James Laudon, Ravi Narayanaswami, and Amir Yazdanbakhsh, "An Evaluation of Edge TPU Accelerators for Convolutional Neural Networks," IISWC 2022, arXiv:2102.10423. arxiv.org/...2102.10423
  21. ^Google Research, "Coral NPU: A full-stack platform for Edge AI," October 15, 2025. research.google/...full-stack-platform-for-edge-ai
  22. ^google-coral/coralnpu repository. github.com/...coralnpu
  23. ^Synaptics, "Google Research and Synaptics Launch Next-Generation Coral Dev Board for Developers to Bring Multimodal Edge AI Applications to Life," March 10, 2026. synaptics.com/...odal-edge-ai-applications-to-life
  24. ^Google for Developers, "Coral: Synaptics." developers.google.com/...synaptics
  25. ^"TensorFlow Lite is now LiteRT," Google Developers Blog, September 4, 2024. developers.googleblog.com/...ow-lite-is-now-litert
  26. ^Frigate, "Recommended hardware." docs.frigate.video/...hardware
  27. ^Frigate, "Object detectors." docs.frigate.video/...object_detectors
  28. ^Hailo, "Hailo-8 AI Accelerator." hailo.ai/...hailo-8-ai-accelerator
  29. ^NVIDIA, "Jetson Orin modules." nvidia.com/...jetson-orin
  30. ^Rockchip, "RK3588." rock-chips.com/...1660
  31. ^CNX Software, "Google open sources the RISC-V based Coral NPU, Synaptics SL2610 edge AI SoCs implement it," October 17, 2025. cnx-software.com/...-synaptics-sl2610-edge-ai-socs
  32. ^DigiCert, "Google to Shut Down IoT Core Service," August 19, 2022. digicert.com/...google-to-shut-down-iot-core-service
  33. ^Google Cloud, "Cloud TPU v6e (Trillium)" documentation (TPU version navigation lists v4, v5e, v5p, v6e, and TPU7x/Ironwood). docs.cloud.google.com/...v6e

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